of each pin can be found in the Functional Description section beginning on page 13. Table 2. 33926 Pin Definitions Pin Pin Name Pin Function Formal Name 1 IN2 Logic Input Input 2 2 IN1 Logic Input Input 1 3 4, 6, 11, 31 5, Exposed Pad 7 8 9, 17, 25 SLEW VPWR AGND INV FB NC Logic Input.
• 5.0 to 28 V continuous operation (transient operation from 5.0 to 40 V)
• 225 m maximum RDS(on) at 150 °C (each H-Bridge MOSFET)
• 3.0 V and 5.0 V TTL / CMOS logic compatible inputs
• Overcurrent limiting (Regulation) via an internal constant-off-time
PWM
• Output short-circuit protection (short to VPWR or ground)
• Temperature dependent current limit threshold reduction
• All Inputs have an internal source/sink to define the default (floating
input) states
• Sleep mode with current draw < 50 µA (with inputs floating or set to
match default logic states)
Document Number: MC33926 Rev. 10.0,.
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