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ICS844252-04 Dataheets PDF



Part Number ICS844252-04
Manufacturers ICS
Logo ICS
Description CRYSTAL-TO-LVDS CLOCK GENERATOR
Datasheet ICS844252-04 DatasheetICS844252-04 Datasheet (PDF)

www.DataSheet4U.com PRELIMINARY Integrated Circuit Systems, Inc. ICS844252-04 FEMTOCLOCKS™ CRYSTAL-TOLVDS CLOCK GENERATOR GENERAL DESCRIPTION The ICS844252-04 is a 10Gb/12Gb Ethernet Clock Generator and a member of the HiPerClockS™ HiPerClocks TM family of high perfor mance devices from ICS. The ICS844252-04 can synthesize 10 Gigabit Ethernet and 12 Gigabit Ethernet with a 25MHz crystal. It can also generate SATA and 10Gb Fibre Channel reference clock frequencies with the appropriate choice .

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www.DataSheet4U.com PRELIMINARY Integrated Circuit Systems, Inc. ICS844252-04 FEMTOCLOCKS™ CRYSTAL-TOLVDS CLOCK GENERATOR GENERAL DESCRIPTION The ICS844252-04 is a 10Gb/12Gb Ethernet Clock Generator and a member of the HiPerClockS™ HiPerClocks TM family of high perfor mance devices from ICS. The ICS844252-04 can synthesize 10 Gigabit Ethernet and 12 Gigabit Ethernet with a 25MHz crystal. It can also generate SATA and 10Gb Fibre Channel reference clock frequencies with the appropriate choice of crystals. The ICS844252-04 has excellent phase jitter performance and is packaged in a small 16-pin TSSOP, making it ideal for use in systems with limited board space. FEATURES • Two differential LVDS outputs • Crystal oscillator interface designed for 18pF parallel resonant crystals • Crystal input frequency range: 19.33MHz - 30MHz • Output frequency range: 145MHz - 187.5MHz • VCO frequency range: 580MHz - 750MHz • RMS phase jitter at 156.25MHz (1.875MHz - 20MHz): 0.36ps (typical) • 3.3V operating supply • 0°C to 70°C ambient operating temperature • Industrial temperature information available upon request • Available in both standard and lead-free compliant packages IC S CONFIGURATION TABLE Crystal Frequency (MHz) 25 25 WITH 25MHZ CRYSTAL Inputs VCO Frequency (MHz) 750 625 N Output Divide 4 4 Output Frequency (MHz) 187.5 156.25 Application 12 Gigabit Ethernet 10 Gigabit Ethernet Feedback Divide 30 25 WITH CONFIGURATION TABLE Crystal Frequency (MHz) 20 21.25 24 25.5 30 SELECTABLE CRYSTALS N Output Divide 4 4 4 4 4 Output Frequency (MHz) 150 159.375 150 159.375 187.5 Application SATA 10 Gigabit Fibre Channel SATA 10 Gigabit Fibre Channel 12 Gigabit Ethernet Inputs Feedback VCO Frequency Divide (MHz) 30 600 30 25 25 25 637.5 600 637.5 750 BLOCK DIAGRAM OE nPLL_SEL REF_CLK Pullup Pulldown PIN ASSIGNMENT D Q LE nQ1 Q1 VDDO OE nPLL_SEL VDDO Q0 nQ0 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 XTAL_IN XTAL_OUT GND REF_CLK CLK_SEL VDD VDDA FREQ_SEL Pulldown 1 1 XTAL_IN OSC XTAL_OUT CLK_SEL Pulldown 0 Phase Detector VCO 580MHz-750MHz DIV. N ÷4 0 Q0 nQ0 Q1 nQ1 ICS844252-04 16-Lead TSSOP 4.4mm x 5.0mm x 0.92mm package body G Package Top View 0 = ÷25 (default) 1 = ÷30 FREQ_SEL Pulldown The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. 844252AG-04 www.icst.com/products/hiperclocks.html REV. A JANUARY 26, 2006 1 PRELIMINARY Integrated Circuit Systems, Inc. ICS844252-04 FEMTOCLOCKS™ CRYSTAL-TOLVDS CLOCK GENERATOR TABLE 1. PIN DESCRIPTIONS Number 1, 2 3, 6 4 Name nQ1, Q1 VDDO OE Power Input Type Output Description Differential clock outputs. LVDS interface levels. Output supply pins. Output enable. When HIGH, clock outputs follow clock input. When LOW, Qx outputs are forced low, nQx outputs are forced high. Pullup LVCMOS/LVTTL interface levels. Selects between the PLL and reference clock as input to the divider. Pulldown When Low, selects PLL. When High, selects reference clock. LVCMOS/LVTTL interface levels. Differential clock outputs. LVDS interface levels. Pulldown Frequency select pin. LVCMOS/LVTTL interface levels. Analog supply pin. Core supply pin. Clock select input. When Low, selects cr ystal inputs. When High, Pulldown selects REF_CLK. LVCMOS/LVTTL interface levels. Pulldown Reference clock input. LVCMOS/LVTTL interface levels. 5 7, 8 9 10 11 12 13 14 nPLL_SEL Q0, nQ0 FREQ_SEL VDDA VDD CLK_SEL REF_CLK Input Output Input Power Power Input Input GND Power Power supply ground. Cr ystal oscillator interface. XTAL_IN is the input, XTAL_OUT, 15, 16 Input XTAL_OUT is the output. XTAL_IN NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characterristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol CIN RPULLUP RPULLDOWN Parameter Input Capacitance Input Pullup Resistor Input Pulldown Resistor Test Conditions Minimum Typical 4 51 51 Maximum Units pF kΩ kΩ 844252AG-04 www.icst.com/products/hiperclocks.html 2 REV. A JANUARY 26, 2006 PRELIMINARY Integrated Circuit Systems, Inc. ICS844252-04 FEMTOCLOCKS™ CRYSTAL-TOLVDS CLOCK GENERATOR ABSOLUTE MAXIMUM RATINGS Supply Voltage, VCC Inputs, VI Outputs, IO Continuous Current Surge Current Storage Temperature, TSTG 4.6V -0.5V to VDD + 0.5V 10mA 15mA -65°C to 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. Package Thermal Impedance, θJA 89°C/W (0 lfpm) TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = VDDO = 3.


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