MB85R1001

www.DataSheet4U.com FUJITSU SEMICONDUCTOR DATA SHEET DS05-13103-2E Memory FRAM CMOS 1 M Bit (128 K × 8) MB85R1001 ■ DESCRIPTIONS The MB85R1001 is an FRAM (Ferroelectric Random Access Memory) chip in a configuration of 131,072 words x 8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. Unlike SRAM, MB85R1001 is able to retain data without back-up battery. The memory cells used for the MB85R1001 has improved at least 1010 times of read/write access, significantly outperforming FLASH memory and E2PROM in endurance. The MB85R1001 used a pseudo - SRAM interface compatible with conventional asynchronous SRAM. ■ FEATURES Bit configuration : 131,072 words x 8bits Read/write endurance : 1010 times Operating power supply voltage : 3.0 V to 3.6 V Operating temperature range : -20 °C to +85 °C 48-pin, TSOP (1) plastic package ■ PACKAGE 48-pin plastic TSOP(1) (FPT-48P-M25) MB85R1001 ■ PIN ASSIGNMENTS (TOP VIEW) A11 A9 N.C. A8 A13 WE CE2 A15 N.C. VCC N.C. N.C. GND N.C. N.C. VCC N.C. A16 A14 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 OE N.C. GND A10 CE1 N.C. I/O8 I/O7 I/O6 I/O5 I/O4 VCC N.C. I/O3 I/O2 I/O1 N.C. N.C. N.C. A0 A1 GND A2 A3 (FPT-48P-M25) ■ PIN DESCRIPTIONS Pin name A0 to A16 I/O1 to I/O8 CE1 CE2 WE OE VCC GND Address In Data Input/Output Chip Enable 1 in Chip Enable 2 in Write En...