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MC68HC908SR12

Freescale Semiconductor

Microcontrollers

www.DataSheet4U.com MC68HC908SR12 MC68HC08SR12 Data Sheet M68HC08 Microcontrollers MC68HC908SR12 Rev. 5.0 07/2004 fr...


Freescale Semiconductor

MC68HC908SR12

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www.DataSheet4U.com MC68HC908SR12 MC68HC08SR12 Data Sheet M68HC08 Microcontrollers MC68HC908SR12 Rev. 5.0 07/2004 freescale.com MC68HC908SR12 MC68HC08SR12 Data Sheet To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://www.freescale.com The following revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location. Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc. This product incorporates SuperFlash® technology licensed from SST. © Freescale Semiconductor, Inc., 2004 MC68HC908SR12MC68HC08SR12 — Rev. 5.0 Freescale Semiconductor Data Sheet 3 Revision History Revision History Date Revision Level Description Table 24-2 . Operating Range and Table 24-11 . 3V ADC Electrical Characteristics — changed minimum VDD for ADC operation to 3V. 15.8.4 ADC Auto-Scan Mode Data Registers (ADRL1–ADRL3) — Corrected ADRL–ADRL3 register bits. PTB0/SDA0, PTB1/SCL0, PTB2/SDA1/TxD, and PTB3/SCL1/RxD pins — clarified these open-drain pins throughout this document. 8.4.6 Programming the PLL — deleted redundant step in programming the PLL. Figure 10-1 . Monitor Mode Circuit — corrected connections for PTA1 and PTA2. Table 10-1 . Monitor Mode Signal Requirements and Options — clari...




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