MX23C1024

INDEX MX23C1024 1M-BIT [64K x 16] CMOS MASK ROM FEATURES 64K x 16 organization (JEDEC pin out) Single +5V power supply Fast access time: 120/150/200ns Totally static operation Completely TTL compatible Operating current: 60mA Standby current: 100uA Package - 40 pin DIP (600 mil) - 44 pin PLCC GENERAL DESCRIPTION The MX23C1024 is a 5V only, 1M-bit, Read Only Memory. It is organized as 64Kx16 bit. MX23C1024 has a static standby mode, and has an access time of 120/150/200ns. It is designed to be compatible with all microprocessors and similar applications in which high performance, large bit storage and simple interfacing are important design considerations. MX23C1024 offers automatic power-down, with powerdown controlled by the chip enable (CE) input. When CE is not selected, the device automatically powers down and remains in a low-power standby mode as long as CE stays in the unselected mode. The OE input as well as CE input may be programmed active Low. www.DataSheet4U.com PIN CONFIGURATION 40 PDIP NC CE Q15 Q14 Q13 Q12 Q11 Q10 Q9 Q8 VSS Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 OE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 VCC NC NC A15 A14 A13 A12 A11 A10 A9 VSS A8 A7 A6 A5 A4 A3 A2 A1 A0 BLOCK DIAGRAM CE OE CONTROL LOGIC OUTPUT BUFFERS Q0~Q15 A0~A15 ADDRESS INPUTS . . . . . . . . Y-DECODER X-DECODER . . . . . . . . Y-DECODER MX23C1024 1M BIT ROM ARRAY VCC VSS 44 PLCC VCC Q13 Q14 Q15 A15 A14 N...