White Electronic Designs
2x32Mx16bit DDR SDRAM
FEATURES
Double-data-rate architecture; two data transfers per clock cycle Data rate = 200, 266, 333, 400 Mbs Package: 66pin TSOP II package 2.5V ±0.2V core power supply 2.5V I/O (SSTL_2 compatible) Differential clock inputs(CK and CK#) DLL aligns DQ and DQS transition with CK MRS cycle with address key progra...
