SRAM
Austin Semiconductor, Inc. 64K x 1 SRAM
SRAM MEMORY ARRAY
MT5C6401
PIN ASSIGNMENT (Top View)
22-Pin DIP (C) (300 ...
SRAM
Austin Semiconductor, Inc. 64K x 1 SRAM
SRAM MEMORY ARRAY
MT5C6401
PIN ASSIGNMENT (Top View)
22-Pin DIP (C) (300 MIL)
A0 A1 A2 A3 A4 A5 A6 A7 Q WE\ Vss 1 2 3 4 5 6 7 8 9 10 11 22 21 20 19 18 17 16 15 14 13 12 Vcc A15 A14 A13 A12 A11 A10 A9 A8 D CE\
AVAILABLE AS MILITARY SPECIFICATIONS
SMD 5962-86015 MIL-STD-883
FEATURES
Speeds: 12, 15, 20, 25, 35, 45, 55, and 70ns Battery Backup: 2V data retention High-performance, low-power CMOS double-metal process Single +5V (+10%) Power Supply Easy memory expansion with CE\ All inputs and outputs are TTL compatible
www.DataSheet4U.com
GENERAL DESCRIPTION
The Austin Semiconductor SRAM family employs high-speed, low-power CMOS designs using a four-
transistor memory cell. Austin Semiconductor SRAMs are fabricated using double-layer metal, double-layer polysilicon technology. For flexibility in high-speed memory applications, Austin Semiconductor offers chip enable (CE\) on all organizations. This enhancement can place the outputs in High-Z for additional flexibility in system design. The X1 configuration features separate data input and output. Writing to these devices is accomplished when write enable (WE\) and CE\ inputs are both LOW. Reading is accomplished when WE\ remains HIGH and CE\ goes LOW. The device offers a reduced power standby mode when disabled. This allows system designs to achieve low standby power requirements. All devices operate from a single +5V power supply and all inputs and outputs are fully ...