Document
CED02N6/CEU02N6
Dec. 2002
N-Channel Logic Level Enhancement Mode Field Effect Transistor
FEATURES
600V , 1.9A , RDS(ON)=5 Ω @VGS=10V. Super high dense cell design for extremely low RDS(ON). High power and current handling capability. TO-251 & TO-252 package.
D
6
G
D G S
G D S
CEU SERIES TO-252AA(D-PAK)
CED SERIES TO-251(l-PAK)
S
ABSOLUTE MAXIMUM RATINGS (Tc=25 C unless otherwise noted)
Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous (Tc=25 C) -Continuous (Tc=100 C) -Pulsed Drain-Source Diode Forward Current Maximum Power Dissipation @Tc=25 C Derate above 25 C Operating and Storage Temperautre Range Symbol VDS VGS ID ID IDM IS PD TJ, TSTG Limit 600 Unit V V A A A A W W/ C C
Ć 30
1.9 1.2 6 6 43 0.34 -55 to 150
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient
6-77
RįJC RįJA
2.9 50
C/W C/W
CED02N6/CEU02N6
ELECTRICAL CHARACTERISTICS (TC=25 C unless otherwise noted)
Parameter
Single Pulse Drain-Source Avalanche Energy Maximum Drain-Source Avalanche Current
Symbol
a
Condition
VDD =50V, L=60mH RG=9.1 Ω
Min Typ Max Unit
DRAIN-SOURCE AVALANCHE RATING
6
EAS IAS
125 2
mJ A
OFF CHARACTERISTICS
Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate-Body Leakage BVDSS IDSS IGSS VGS(th) RDS(ON) ID(ON) gFS
b
VGS = 0V,ID = 250µA VDS = 600V, VGS = 0V VGS = Ć30V, VDS = 0V VDS = VGS, ID = 250µA VGS =10V, ID = 1A VGS = 10V, VDS = 10V VDS = 50V, ID = 1A VDD = 300V, ID = 2A, VGS = 10V RGEN=18Ω
600 25
V µA Ć100 nA
ON CHARACTERISTICS a
Gate Threshold Voltage Drain-Source On-State Resistance On-State Drain Current Forward Transconductance 2 3.8 2 1.2 18 18 50 16 20 VDS =480V, ID = 2A, VGS =10V
6-78
4 5.0
V Ω A S
SWITCHING CHARACTERISTICS
Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
tD(ON) tr tD(OFF) tf Qg Qgs Qgd
35 35 90 40 25
ns ns ns ns nC nC nC
2 12
CED02N6/CEU02N6
ELECTRICAL CHARACTERISTICS (TC=25 C unless otherwise noted)
Parameter DYNAMIC CHARACTERISTICS b
Input Capacitance Output Capacitance Reverse Transfer Capacitance Diode Forward Voltage CISS COSS CRSS
a
Symbol
Condition
Min Typ Max Unit
250 50 30
PF PF PF
VDS =25V, VGS = 0V f =1.0MHZ
6
DRAIN-SOURCE DIODE CHARACTERISTICS
VSD
VGS = 0V, Is =2A
1.5
V
Notes a.Pulse Test:Pulse Widthś 300ijs, Duty Cycle ś 2%. b.Guaranteed by design, not subject to production testing.
3.0 VGS=10,9,8,7V 2.5
ID, Drain Current(A)
2.0 1.5 1.0
ID, Drain Current (A)
150 C
1
VGS=6V
VGS=5V
0.5 0 0 2 4 6 8 10 12
-55 C 25 C
1.VDS=40V 2.Pulse Test
0.1 2
4
6
8
10
VDS, Drain-to-Source Voltage (V)
VGS, Gate-to-Source Voltage (V)
Figure 1. Output Characteristics
Figure 2. Transfer Characteristics
6-79
CED02N6/CEU02N6
RDS(ON), Normalized RDS(ON), On-Resistance(Ohms)
600 500
2.2 1.9 1.6 1.3 1.0 0.7 0.4 -100 -50 0 50 100 150 200
ID=1A VGS=10V
C, Capacitance (pF)
400 300 200 100 0 0 5 10 15 20 25 Coss Crss Ciss
6
1.30 1.20 1.10 1.0 0.90 0.80 0.70
VDS, Drain-to Source Voltage (V)
TJ, Junction Temperature( C)
Figure 3. Capacitance
BVDSS, Normalized Drain-Source Breakdown Voltage Vth, Normalized Gate-Source Threshold Voltage
Figure 4. On-Resistance Variation with Temperature
1.15 1.10 1.05 1.00 0.95 0.90 0.85 -50 -25 ID=250ijA
VDS=VGS ID=250ijA
0.60 -50 -25
0
25
50
75 100 125 150
0
25
50
75 100 125 150
Tj, Junction Temperature ( C)
Tj, Junction Temperature ( C)
Figure 5. Gate Threshold Variation with Temperature
4
Figure 6. Breakdown Voltage Variation with Temperature
20 10 VGS=0V
gFS, Transconductance (S)
VDS=50V 3
2
Is, Source-drain current (A)
0 1 2 3 4
1
1 0
0.1 0.4 0.6 0.8 1.0 1.2
IDS, Drain-Source Current (A)
VSD, Body Diode Forward Voltage (V)
Figure 7. Transconductance Variation with Drain Current 6-80
Figure 8. Body Diode Forward Voltage Variation with Source Current
CED02N6/CEU02N6
VGS, Gate to Source Voltage (V)
15 12 9 6 3 0 0 6 12 18 24
Qg, Total Gate Charge (nC)
10
ID, Drain Current (A)
VDS=480V ID=2A
100 ijs
1
R
DS
(O
N)
Li
t mi
DC
1ms 10ms
0.1 TC=25C Tj=25 C Single Pulse 1 10 100 500 1000
0.01
6
VDS, Drain-Source Voltage (V)
Figure 9. Gate Charge
Figure 10. Maximum Safe Operating Area
VDD t on V IN D VGS RGEN G
90%
toff tr
90%
RL VOUT
td(on) VOUT
td(off)
90% 10%
tf
10%
INVERTED
S
VIN
50% 10%
50%
PULSE WIDTH
Figure 11. Switching Test Circuit
Figure 12. Switching Waveforms
2
r(t),Normalized Effective Transient Thermal Impedance
1 D=0.5 0.2
0.1 0.1 0.05 0.02 0.01 Single Pulse PDM t1 t2 1. RįJC (t)=r (t) * RįJC 2. RįJC=See Datasheet 3. TJM-TC = P* RįJC (t) 4. Duty Cycle, D=t1/t2 1 10 100 1000 10000
0.01 0.01
0.1
Square Wave Pulse Duration (msec)
Figure 13. Normalized Thermal Transient Impedance Curve
6-81
.