Micrel, Inc.
ULTRA-PRECISION DIFFERENTIAL CML 2:1 MUX with INTERNAL I/O TERMINATION
Precision Edge®
Precision ESdY5g8e0®17U
SY58017U
FEATURES
■ Guaranteed AC performance over temperature and voltage:
• DC to > 10.7Gbps data throughput • DC to > 7GHz fMAX (clock) • < 240ps propagation delay • < 60ps tr / tf times ■ Ultra-low crosstalk-induced jitter: < 0.7psrms ■ Ultra-low jitter design: • < 1psRMS random jitter • < 10psPP deterministic jitter • < 10psPP total jitter (clock) ■ Unique input termination and VT pin accepts DCcoupled and AC-coupled inputs (CML, PECL, LVDS)
■ Internal 50Ω output source termination ■ Typical 400mV CML output swing (RL = 50Ω) ■ Power supply 2.5V ±5% or 3.3V ±10% ■ –40°C to +85°C temperature range ■ Available in 16-pin (3mm × 3mm) MLF® package
APPLICATIONS
■ Redundant clock distribution
■ OC-3 to OC-192 SONET/SDH clock/data distribution
■ Loopback
■ Fibre Channel distribution
Precision Edge®
DESCRIPTION
The SY58017U is a 2.5V/3.3V precision, high-speed, 2:1 differential MUX capable of handling clocks up to 7GHz and data up to 10.7Gbps.
The differential input includes Micrel’s unique, 3-pin input termination architecture that allows customers to interface to any differential signal (AC- or DC-coupled) as small as 100mV without any level shifting or termination resistor networks in the signal path. The outputs are 50Ω source terminated CML, with extremely fast rise/fall times guaranteed to be less than 60ps.
The SY58017U operates from a 2.5V ±5% supply or a 3.3V ±10% supply and is guaranteed over the full industrial temperature range of –40°C to +85°C. For applications that require LVPECL outputs, consider the SY58018U or SY58019U Multiplexers with LVPECL outputs. The SY58017U is part of Micrel’s high-speed, Precision Edge® product line.
All support documentation can be found on Micrel’s web site at www.micrel.com.
FUNCTIONAL BLOCK DIAGRAM
IN0 50Ω
VT0 50Ω
/IN0
IN1 50Ω
VT1 50Ω
/IN1
SEL (TTL/CMOS)
0 MUX
1S
Output Swing (100mV/div.)
TYPICAL PERFORMANCE
10.7Gbps Output Q0 /Q0
TIME (25ps/div.) (223–1 PRBS)
Precision Edge and AnyGate are registered trademarsk of Micrel, Inc. MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc.
M9999-082807
[email protected] or (408) 955-1690
1
Rev.: D Amendment: /0 Issue Date: August 2007
Micrel, Inc.
Precision Edge® SY58017U
PACKAGE/ORDERING INFORMATION
Ordering Information(1)
VT0 GND GND VCC
16 15 14 13
IN0 1 /IN0 2 IN1 3 /IN1 4
12 Q 11 GND 10 GND
9 /Q
5678
VT1 SEL NC VCC
16-Pin MLF® (MLF-16)
Part Number SY58017UMI SY58017UMITR(2) SY58017UMG(3)
Package Type
MLF-16
MLF-16 MLF-16
SY58017UMGTR(2, 3) MLF-16
Operating Range
Industrial Industrial Industrial
Industrial
Package Marking
017U
017U
017U with Pb-Free bar-line indicator
017U with Pb-Free bar-line indicator
Lead Finish
Sn-Pb
Sn-Pb
Pb-Free NiPdAu
Pb-Free NiPdAu
Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC electricals only. 2. Tape and Reel. 3. Pb-Free package recommended for new designs.
PIN DESCRIPTION
Pin Number 1, 2 3, 4
16, 5
6
7 8, 13 12, 9
10, 11, 14, 15
Pin Name IN0, /IN0 IN1, /IN1
VT0, VT1
SEL
NC VCC Q, /Q
GND, Exposed Pad
Pin Function
Differential Input: These input pairs are the differential signal inputs to the device. They accept differential AC- or DC-coupled signals as small as 100mV. Each pin of a pair internally terminates to a VT pin through 50Ω. Note that these inputs will default to an indeterminate state if left open. Please refer to the “Input Interface Applications” section for more details.
Input Termination Center-Tap: Each side of the differential input pair terminates to a VT pin. The VT0 and VT1 pins provide a center-tap to a termination network for maximum interface flexibility. See “Input Interface Applications” section for more details.
This single-ended TTL/CMOS compatible input selects the inputs to the multiplexer. Note that this input is internally connected to a 25kΩ pull-up resistor and will default to a logic HIGH state if left open.
No connect.
Positive Power Supply: Bypass with 0.1µF0.01µF low ESR capacitors. 0.01µF capacitor should be as close to VCC pin as possible.
Differential Outputs: This CML output pair is the output of the device. Normally terminate with 100Ω across Q and /Q. See “Output Interface Applications” section. It is a logic function of the IN0, IN1, and SEL inputs. Please refer to the “Truth Table” for details.
Ground. Ground pins and exposed pad must be connected to the same ground plane.
TRUTH TABLE TRUTH TABLE
SEL 0 1
Output IN0 Input Selected IN1 Input Selected
M9999-082807
[email protected] or (408) 955-1690
2
Micrel, Inc.
Precision Edge® SY58017U
Absolute Maximum Ratings(1)
Power Supply Voltage (VCC ) ...................... –0.5V to +4.0V Input Voltage (VIN) ......................................... –0.5V to VCC CML Out.