Pecl Divider
Micrel
5V/3.3V ÷ 2 DIVIDER
Precision Edge™ SY10EP32V SY100EP32V SY10EP32V SY100EP32V FINAL
Precision Edge™
FEATURES
...
Description
Micrel
5V/3.3V ÷ 2 DIVIDER
Precision Edge™ SY10EP32V SY100EP32V SY10EP32V SY100EP32V FINAL
Precision Edge™
FEATURES
s Guaranteed maximum frequency > 4GHz s 3.3V and 5V power supply options s Guaranteed propagation delay <440ps over temperature s Internal 75KΩ input pull-down resistors s Wide operating temperature range: –40°C to +85°C s Available in 8-pin MSOP and SOIC packages
ECL Pro™ DESCRIPTION
The SY10/100EP32V is an integrated ÷2 divider with differential clock inputs. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC-coupled inputs. When used, decouple VBB and VCC via a 0.01µF capacitor and limit current sourcing or sinking to 0.5mA. When not used, VBB should be left open. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the reset allows for the synchronous use of multiple EP32’s in a system. The 100k series includes internal temperature compensation circuitry.
PIN CONFIGURATION/BLOCK DIAGRAM
Reset CLK /CLK VBB
1 R 2 ÷2 3 4
8 7 6 5
VCC Q
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PIN NAMES
/Q VEE
Pin CLK, /CLK Reset
Function ECL Clock Inputs ECL Asynchronous Reset Reference Voltage Output ECL Data Outputs
TOP VIEW (Available in MSOP or SOIC package)
VBB Q, /Q
TRUTH TABLE(1)
CLK X Z
Note 1:
/CLK X /Z
RESET Z L
Q L ...
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