SY100S307

Micrel, Inc. QUINT EXCLUSIVE OR/NOR GATE SY100S307 SY100S307 FEATURES DESCRIPTION ■ Max. propagation delay of 1000ps ■ IEE min. of –58mA ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ Voltage and temperature compensation for improved noise immunity ■ Internal 75kΩ input pull-down resistors ■ 50% faster than Fairchild 300K at lower power ■ Function and pinout compatible with Fairchild F100K ■ Available in 28-pin PLCC package The SY100S307 is an ultra-fast quint exclusive-OR/NOR gate designed for use in high-performance ECL systems. A function output that is the wire-OR result of the exclusive-OR outputs is also available. The inputs on the device have 75kΩ pull-down resistors. block DIAGRAM PIN NAMES Pin Dna – Dne E Oa – Oe Oa – Oe VEES VCCA Function Data Inputs (n-1...5) Enable Input Data Outputs Complementary Data Outputs VEE Substrate VCCO for ECL Outputs M9999-060910 hbwhelp@micrel.com or (408) 955-1690 1 Rev.: I Amendment: /0 Issue Date: June 2010 Micrel, Inc. SY100S307 PACKAGE/ORDERING INFORMATION 28-Pin PLCC (J28-1) Ordering Information Part Number SY100S307JC Package Operating Type Range J28-1 Commercial SY100S307JCTR(1) J28-1 Commercial SY100S307JZ(2) J28-1 Commercial SY100S307JZTR(1, 2) J28-1 Commercial SY100S307JY(2) J28-1 Industrial Package Marking Lead Finish SY100S307JC Sn-Pb SY100S307JC Sn-Pb SY100S307JZ with Matte-Sn Pb-Free bar-line indicator ...