Document
MC74LCX16374
Low-Voltage CMOS 16-Bit D-Type Flip-Flop
With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting)
The MC74LCX16374 is a high performance, non−inverting 16−bit D−type flip−flop operating from a 2.3 V to 3.6 V supply. The device is byte controlled. Each byte has separate Output Enable and Clock Pulse inputs. These control pins can be tied together for full 16−bit operation. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5 V allows MC74LCX16374 inputs to be safely driven from 5.0 V devices.
The MC74LCX16374 consists of 16 edge−triggered flip−flops with individual D−type inputs and 5.0 V−tolerant 3−state true outputs. The buffered clocks (CPn) and buffered Output Enables (OEn) are common to all flip−flops within the respective byte. The flip−flops will store the state of individual D inputs that meet the setup and hold time requirements on the LOW−to−HIGH Clock (CP) transition. With the OE LOW, the contents of the flip−flops are available at the outputs. When the OE is HIGH, the outputs go to the high impedance state. The OE input level does not affect the operation of the flip−flops.
Features
• Designed for 2.3 to 3.6 V VCC Operation • 6.2 ns Maximum tpd • 5.0 V Tolerant − Interface Capability With 5.0 V TTL Logic • Supports Live Insertion and Withdrawal • IOFF Specification Guarantees High Impedance When VCC = 0 V • LVTTL Compatible • LVCMOS Compatible • 24 mA Balanced Output Sink and Source Capability • Near Zero Static Supply Current in All Three Logic States (20 mA)
Substantially Reduces System Power Requirements
• Latchup Performance Exceeds 500 mA • ESD Performance:
♦ Human Body Model >2000 V ♦ Machine Model >200 V
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
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48 1
TSSOP−48 DT SUFFIX CASE 1201
MARKING DIAGRAM
48
LCX16374G AWLYYWW
1
A
= Assembly Location
WL = Wafer Lot
YY
= Year
WW = Work Week
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
1
October, 2012 − Rev. 10
Publication Order Number: MC74LCX16374/D
MC74LCX16374
OE1 1 O0 2 O1 3
GND 4 O2 5 O3 6 VCC 7 O4 8 O5 9
GND 10 O6 11 O7 12 O8 13 O9 14
GND 15 O10 16 O11 17 VCC 18 O12 19 O13 20 GND 21 O14 22 O15 23 OE2 24
48 CP1 47 D0 46 D1 45 GND 44 D2 43 D3 42 VCC 41 D4 40 D5 39 GND 38 D6 37 D7 36 D8 35 D9 34 GND 33 D10 32 D11 31 VCC 30 D12 29 D13 28 GND 27 D14 26 D15 25 CP2
Figure 1. Pinout: 48−Lead (Top View)
1 OE1
48 CP1
47 D0
46 D1
44 D2
43 D3
41 D4
40 D5
38 D6
37 D7
nCP Q
D
nCP Q
D
nCP Q
D
nCP Q
D
nCP Q
D
nCP Q
D
nCP Q
D
nCP Q
D
2 O0
24 OE2
25 CP2
36 D8
nCP Q
D
3 O1
35 D9
nCP Q
D
5 O2
33 D10
nCP Q
D
6 O3
32 D11
nCP Q
D
8 O4
30 D12
nCP Q
D
9 O5
29 D13
nCP Q
D
11 O6
27 D14
nCP Q
D
12 O7
26 D15
nCP Q
D
Figure 2. Logic Diagram
Table 1. PIN NAMES Pins OEn CPn
D0−D15 O0−O15
Function Output Enable Inputs
Clock Pulse Inputs Inputs Outputs
13 O8
14 O9
16 O10
17 O11
19 O12
20 O13
22 O14
23 O15
TRUTH TABLE
Inputs
CP1
OE1
↑
L
↑
L
L
L
X
H
D0:7 H L X X
Outputs O0:7 H L O0 Z
Inputs
CP2
OE2
D8:15
↑
L
H
↑
L
L
L
L
X
X
H
X
H = High Voltage Level L = Low Voltage Level Z = High Impedance State ↑ = Low−to−High Transition X = High or Low Voltage Level and Transitions Are Acceptable; for ICC reasons, DO NOT FLOAT Inputs
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Outputs O8:15 H L O0 Z
MC74LCX16374
ORDERING INFORMATION Device
Package
Shipping†
MC74LCX16374DTG
TSSOP−48 (Pb−Free)
39 Units / Rail
M74LCX16374DTR2G
TSSOP−48 (Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
MAXIMUM RATINGS
Symbol
Parameter
Value
Condition
Units
VCC DC Supply Voltage
VI
DC Input Voltage
VO DC Output Voltage
IIK
DC Input Diode Current
IOK DC Output Diode Current
IO ICC IGND TSTG MSL
DC Output Source/Sink Current DC Supply Current Per Supply Pin DC Ground Current Per Ground Pin Storage Temperature Range Moisture Sensitivity
−0.5 to +7.0
V
−0.5 ≤ VI ≤ +7.0
V
−0.5 ≤ VO ≤ +7.0
Output in 3−State
V
−0.5 ≤ VO ≤ VCC + 0.5 Output in HIGH or LOW State. (Note 1)
V
−50
VI < GND
mA
−50
VO < GND
mA
+50
VO > VCC
mA
±50
mA
±100
mA
±100
mA
−65 to +150
°C
Level 1
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. IO absolute maximum rating .