DatasheetsPDF.com

MC10H173 Dataheets PDF



Part Number MC10H173
Manufacturers ON Semiconductor
Logo ON Semiconductor
Description Quad 2-Input Multiplexer/Latch
Datasheet MC10H173 DatasheetMC10H173 Datasheet (PDF)

www.DataSheet4U.com MC10H173 Quad 2−Input Multiplexer/ Latch The MC10H173 is a quad 2−input multiplexer with latch. This device is a functional/pinout duplication of the standard MECL 10K part, with 100% improvement in propagation delay and no increase in power supply current. • Data Propagation Delay, 1.5 ns Typical • Power Dissipation, 275 mW Typical • Improved Noise Margin 150 mV (over operating voltage and temperature range) • Voltage Compensated • MECL 10K−Compatible TRUTH TABLE SELECT H L.

  MC10H173   MC10H173


Document
www.DataSheet4U.com MC10H173 Quad 2−Input Multiplexer/ Latch The MC10H173 is a quad 2−input multiplexer with latch. This device is a functional/pinout duplication of the standard MECL 10K part, with 100% improvement in propagation delay and no increase in power supply current. • Data Propagation Delay, 1.5 ns Typical • Power Dissipation, 275 mW Typical • Improved Noise Margin 150 mV (over operating voltage and temperature range) • Voltage Compensated • MECL 10K−Compatible TRUTH TABLE SELECT H L X CLOCK L L H Q0n + 1 D00 D01 Q0n PDIP−16 P SUFFIX CASE 648 1 1 PLCC−20 FN SUFFIX CASE 775 VCC Q2 Q3 D20 D21 D30 D31 SELECT 10H173 AWLYYWW http://onsemi.com MARKING DIAGRAMS 16 CDIP−16 L SUFFIX CASE 620 1 16 MC10H173P AWLYYWW MC10H173L AWLYYWW DIP PIN ASSIGNMENT Q0 Q1 D11 D10 D01 D00 CLOCK VEE 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 A WL YY WW = Assembly Location = Wafer Lot = Year = Work Week ORDERING INFORMATION Device MC10H173L MC10H173P MC10H173FN Package CDIP−16 PDIP−16 PLCC−20 Shipping 25 Units/Rail 25 Units/Rail 46 Units/Rail Pin assignment is for Dual−in−Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D). © Semiconductor Components Industries, LLC, 2006 June, 2006 − Rev. 7 1 Publication Order Number: MC10H173/D MC10H173 MAXIMUM RATINGS Symbol VEE VI Iout TA Tstg Power Supply (VCC = 0) Input Voltage (VCC = 0) Output Current − Continuous − Surge Operating Temperature Range Storage Temperature Range − Plastic − Ceramic Characteristic Rating −8.0 to 0 0 to VEE 50 100 0 to +75 −55 to +150 −55 to +165 Unit Vdc Vdc mA °C °C °C ELECTRICAL CHARACTERISTICS (VEE = −5.2 V ±5%) (See Note 1.) 0° Symbol IE IinH Characteristic Power Supply Current Input Current High Pins 3−7 & 10−13 Pin 9 Input Current Low High Output Voltage Low Output Voltage High Input Voltage Low Input Voltage Propagation Delay Data Clock Select Set−up Time Data Select Hold Time Data Select Rise Time Min − − − 0.5 −1.02 −1.95 −1.17 −1.95 Max 73 510 475 − −0.84 −1.63 −0.84 −1.48 Min − − − 0.5 −0.98 −1.95 −1.13 −1.95 25° Max 66 320 300 − −0.81 −1.63 −0.81 −1.48 Min − − − 0.3 −0.92 −1.95 −1.07 −1.95 75° Max 73 320 300 − −0.735 −1.60 −0.735 −1.45 Unit mA μA IinL VOH VOL VIH VIL tpd μA Vdc Vdc Vdc Vdc ns AC PARAMETERS 0.7 1.0 1.0 0.7 1.0 0.7 1.0 0.7 2.3 3.7 3.6 − − − − 2.4 0.7 1.0 1.0 0.7 1.0 0.7 1.0 0.7 2.3 3.7 3.6 − − − − 2.4 0.7 1.0 1.0 0.7 1.0 0.7 1.0 0.7 2.3 3.7 3.6 − − − − 2.4 tset ns thold ns tr ns tf Fall Time 0.7 2.4 0.7 2.4 0.7 2.4 ns 1. Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through a 50−ohm resistor to −2.0 volts. http://onsemi.com 2 MC10H173 APPLICATION INFORMATION The MC10173 is a quad two−channel multiplexer with latch. It incorporates common clock and common data select inputs. The select input determines which data input is enabled. A high (H) level enables data inputs D00, D10, D20, and D30 and a low (L) level enables data inputs D01, D11, D21, D31. Any change on the data input will be reflected at the outputs while the clock is low. The outputs are latched on the positive transition of the clock. While the clock is in the high state, a change in the information present at the data inputs will not affect the output information. LOGIC DIAGRAM SELECT 9 1 Q0 D00 6 D01 5 D10 4 D11 3 2 Q1 D20 13 D21 12 15 Q2 D30 11 D31 10 CLOCK 7 VCC = PIN 16 VEE = PIN 8 14 Q3 http://onsemi.com 3 MC10H173 PACKAGE DIMENSIONS PLCC−20 FN SUFFIX PLASTIC PLCC PACKAGE CASE 775−02 ISSUE C B − N− Y BRK D −L− − M− W D V A Z R 0.007 (0.180) M T L−M 0.007 (0.180) M T L−M S 0.007 (0.180) M T L−M U S N S S 0.007 (0.180) M T L−M N S Z 20 1 X VIEW D−D N N S G1 0.010 (0.250) S T L−M S N S H K1 K 0.007 (0.180) M T L−M S N S S S C E G G1 0.010 (0.250) S T L−M J 0.004 (0.100) −T− SEATING PLANE F VIEW S NOTES: 1. DATUMS −L−, −M−, AND −N− DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM −T−, SEATING PLANE. 3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION .


MC10H172 MC10H173 MC10H175


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)