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14-Bit, 200 MSPS/500 MSPS TxDAC+® with 2×/4×/8× Interpolation and Signal Processing
Preliminary Technical Data
FEATURES
14-bit resolution, 200 MSPS input data rate Selectable 2×/4×/8× interpolation filters Selectable fDAC/2, fDAC/4, fDAC/8 modulation modes Single or dual-channel signal processing Selectable image rejection Hilbert transform Flexible calibration engine Direct IF transmission features Serial control interface Versatile clock and data interface SFDR: 90 dBc @10 MHz WCDMA ACLR = 80 dBc @ 40 MHz IF DNL = ±0. 75 LSB INL = ±1. 5 LSB 3. 3 V compatible digital Interface On-chip 1. 2 V reference 80-lead thermally enhanced TQFP package APPLICATIONS Digital quadrature m...