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SST39VF6402B Dataheets PDF



Part Number SST39VF6402B
Manufacturers SST
Logo SST
Description (SST39VF6401B / SST39VF6402B) 64 Mbit (x16) Multi-Purpose Flash Plus
Datasheet SST39VF6402B DatasheetSST39VF6402B Datasheet (PDF)

www.DataSheet4U.com 64 Mbit (x16) Multi-Purpose Flash Plus SST39VF6401B / SST39VF6402B SST39VF640xB2.7V 64Mb (x16) MPF+ memories Data Sheet FEATURES: • Organized as 4M x16 • Single Voltage Read and Write Operations – 2.7-3.6V • Superior Reliability – Endurance: 100,000 Cycles (Typical) – Greater than 100 years Data Retention • Low Power Consumption (typical values at 5 MHz) – Active Current: 9 mA (typical) – Standby Current: 3 µA (typical) – Auto Low Power Mode: 3 µA (typical) • Hardware Bloc.

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www.DataSheet4U.com 64 Mbit (x16) Multi-Purpose Flash Plus SST39VF6401B / SST39VF6402B SST39VF640xB2.7V 64Mb (x16) MPF+ memories Data Sheet FEATURES: • Organized as 4M x16 • Single Voltage Read and Write Operations – 2.7-3.6V • Superior Reliability – Endurance: 100,000 Cycles (Typical) – Greater than 100 years Data Retention • Low Power Consumption (typical values at 5 MHz) – Active Current: 9 mA (typical) – Standby Current: 3 µA (typical) – Auto Low Power Mode: 3 µA (typical) • Hardware Block-Protection/WP# Input Pin – Top Block-Protection (top 32 KWord) for SST39VF6402B – Bottom Block-Protection (bottom 32 KWord) for SST39VF6401B • Sector-Erase Capability – Uniform 2 KWord sectors • Block-Erase Capability – Uniform 32 KWord blocks • Chip-Erase Capability • Erase-Suspend/Erase-Resume Capabilities • Hardware Reset Pin (RST#) • Security-ID Feature – SST: 128 bits; User: 128 bits • Fast Read Access Time: – 70 ns – 90 ns • Latched Address and Data • Fast Erase and Word-Program: – Sector-Erase Time: 18 ms (typical) – Block-Erase Time: 18 ms (typical) – Chip-Erase Time: 40 ms (typical) – Word-Program Time: 7 µs (typical) • Automatic Write Timing – Internal VPP Generation • End-of-Write Detection – Toggle Bits – Data# Polling • CMOS I/O Compatibility • JEDEC Standard – Flash EEPROM Pin Assignments – Software command sequence compatibility - Address format is 11 bits, A10-A0 - Block-Erase 6th Bus Write Cycle is 30H - Sector-Erase 6th Bus Write Cycle is 50H • Packages Available – 48-lead TSOP (12mm x 20mm) – 48-ball TFBGA (8mm x 10mm) • All non-Pb (lead-free) devices are RoHS compliant configuration, or data memory. For all system applications, they significantly improve performance and reliability, while lowering power consumption. They inherently use less energy during Erase and Program than alternative flash technologies. The total energy consumed is a function of the applied voltage, current, and time of application. Since for any given voltage range, the SuperFlash technology uses less current to program and has a shorter erase time, the total energy consumed during any Erase or Program operation is less than alternative flash technologies. These devices also improve flexibility while lowering the cost for program, data, and configuration storage applications. The SuperFlash technology provides fixed Erase and Program times, independent of the number of Erase/Program cycles that have occurred. Therefore the system software or hardware does not have to be modified or de-rated as is necessary with alternative flash technologies, whose Erase and Program times increase with accumulated Erase/Program cycles. To meet high-density, surface mount requirements, the SST39VF640xB devices are offered in 48-lead TSOP and 48-ball TFBGA packages. See Figures 1 and 2 for pin assignments. The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. MPF is a trademark of Silicon Storage Technology, Inc. These specifications are subject.


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