NE321000

www.DataSheet4U.com ULTRA LOW NOISE PSEUDOMORPHIC HJ FET FEATURES SUPER LOW NOISE FIGURE: 0.35 dB Typ at f = 12 GHz Noise Figure, NF (dB) NE321000 NOISE FIGURE & ASSOCIATED GAIN vs. DRAIN CURRENT VDS = 2 V f = 12 GHz 15 GA 14 13 2.0 1.5 1.0 0.5 NF 0 10 20 30 12 11 GATE LENGTH: ≤0.2 µm GATE WIDTH: 160 µm DESCRIPTION NEC's NE321000 is a Hetero-Junction FET chip that utilizes the junction between Si-doped AlGaAs and undoped InGaAs to create high electron mobility. Its excellent low noise figure and high associated gain make it suitable for commercial, industrial and space applications. NEC's stringent quality assurance and test procedures assure the highest reliability and performance. Drain Current, ID (mA) ELECTRICAL CHARACTERISTICS (TA = 25°C) PART NUMBER PACKAGE OUTLINE SYMBOLS NF GA1 IDSS VP gM IGSO PARAMETERS AND CONDITIONS Noise Figure, VDS = 2 V, ID = 10 mA, f = 12 GHz Associated Gain, VDS = 2 V, ID = 10 mA, f = 12 GHz Saturated Drain Current, VDS = 2 V, VGS = 0 V Pinch-off Voltage, VDS = 2 V, ID = 100 µA Transconductance, VDS = 2 V, ID = 10 µA Gate to Source Leakage Current, VGS = -3 V UNITS dB dB mA V mS µA 12.0 15 -0.2 40 MIN NE321000 CHIP TYP 0.35 13.5 40 -0.7 55 0.5 10 70 -2.0 MAX 0.45 Note: 1. RF performance is determined by packaging and testing 10 samples per wafer. Wafer rejection criteria for standard devices is 2 rejects per 10 samples. California Eastern Laboratories Associated Gain, GA (dB) HIGH ASSOCIATED GAIN: 13.0 dB Typ at f = 12 GH...