3.3V 16-Bit Transparent D-Type Latches
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PRELIMINARY
3.3V 16-Bit Transparent D-Type Latches
1OE 1Q1 1Q2 GND 1Q3 1Q4 VCC 1Q5 1Q6 GND 1Q7 1Q8...
Description
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PRELIMINARY
3.3V 16-Bit Transparent D-Type Latches
1OE 1Q1 1Q2 GND 1Q3 1Q4 VCC 1Q5 1Q6 GND 1Q7 1Q8 2Q1 2Q2 GND 2Q3 2Q4 VCC 2Q5 2Q6 GND 2Q7 2Q8 2OE 24 25 1 48 1LE 1D1 1D2 GND 1D3 1D4 VCC 1D5 1D6 GND 1D7 1D8
54LVTH162373
Logic Diagram (PositiveLogic) 1/24
1OE/2OE
1LE/2LE
48/25
C1 1D1/2D1 47/36 1D
2/13
1Q1/2Q1
54LVTH162373
2D1 2D2 GND 2D3 2D4 VCC 2D5 2D6 GND 2D7 2D8 2LE
To Seven Other Channels
Logic Diagram
Memory
FEATURES:
3.3V low voltage advanced BiCMOS technology (LVT) 16bit transparent D-type latches with 3-state outputs Total dose hardness: - > 100 krad (Si), depending upon space mission Excellent Single Event Effect: - SELTH: No LU > 119 MeV/mg/cm2 Package: 48 pin RAD-PAK® flat package Operating temperature range: - 55 to 125°C Distributed VCC and GND pin configuration minimizes highspeed switching noise Supports mixed-mode signal operation - 5V input and output voltages with 3.3V VCC Supports unregulated battery operation down to 2.7V Supports live insertion Bus-hold data inputs eliminate the need for external pullup resistors
DESCRIPTION:
Maxwell Technologies’ 54LVTH162373 16-bit transparent Dtype latches with 3-state output features a greater than 100 krad (Si) total dose tolerance, depending upon space mission. The 54LVTH162373 is designed for low voltage (3.3V) VCC operation, but with the capability to provide a TTL interface to a 5V system environment. It is suitable for implementing buffer registers, I/O port...
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