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ICS84325 Dataheets PDF



Part Number ICS84325
Manufacturers ICST
Logo ICST
Description CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
Datasheet ICS84325 DatasheetICS84325 Datasheet (PDF)

www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS84325 CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER WITH FANOUT BUFFER FEATURES • 6 differential 3.3V LVPECL outputs • Crystal oscillator interface • Output frequency range: 106.25MHz to 250MHz • Crystal input frequency: 25MHz and 25.5MHz • Output skew: 60ps (maximum) • RMS phase jitter at 212.5MHz, using a 25.5MHz crystal (637KHz to 10MHz): 2.76ps • Phase noise: Typical at 212.5MHz Offset Noise Power 100Hz .. -92 dBc/Hz 1KH.

  ICS84325   ICS84325



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www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS84325 CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER WITH FANOUT BUFFER FEATURES • 6 differential 3.3V LVPECL outputs • Crystal oscillator interface • Output frequency range: 106.25MHz to 250MHz • Crystal input frequency: 25MHz and 25.5MHz • Output skew: 60ps (maximum) • RMS phase jitter at 212.5MHz, using a 25.5MHz crystal (637KHz to 10MHz): 2.76ps • Phase noise: Typical at 212.5MHz Offset Noise Power 100Hz ................. -92 dBc/Hz 1KHz ................. -112 dBc/Hz 10KHz ................. -120 dBc/Hz 100KHz ................. -122 dBc/Hz • 3.3V supply voltage • 0°C to 70°C ambient operating temperature • Lead-Free package available. GENERAL DESCRIPTION The ICS84325 is a Crystal-to-3.3V LVPECL Frequency Synthesizer with Fanout Buffer and a HiPerClockS™ member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The output frequency can be programmed using frequency select pins. The low phase noise characteristics of the ICS84325 make it an ideal clock source for Fibre Channel 1, Fibre Channel 2, Infiniband and Gigabit Ethernet applications. ICS FUNCTION TABLE Inputs MR 1 0 0 0 0 F_SEL1 X 0 0 1 1 F_SEL0 X 0 1 0 1 25.5MHz 25.5MHz 25MHz 25MHz XTAL Output Frequency F_OUT LOW 106.25MHz 212.5MHz 125MHz 250MHz • Industrial temperature information available upon request BLOCK DIAGRAM PIN ASSIGNMENT Q0 nQ0 Q1 nQ1 Q2 nQ2 Q3 nQ3 Q4 nQ4 Q5 nQ5 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCCO F_SEL0 F_SEL1 MR XTAL1 XTAL2 VEE VCCA VCC PLL_SEL VEE VCCO XTAL1 OSC XTAL2 0 1 6 Output Divider 6 PLL / / Q0:Q5 nQ0:nQ5 Feedback Divider ICS84325 24-Lead, 300-MIL SOIC 7.5mm x 15.33mm x 2.3mm body package M Package Top View F_SEL1 MR PLL_SEL F_SEL0 84325EM www.icst.com/products/hiperclocks.html 1 REV. B OCTOBER 11, 2004 Integrated Circuit Systems, Inc. ICS84325 CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER WITH FANOUT BUFFER Type Output Output Output Output Output Output Power Power Description Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Output supply pins. Core supply pin. Negative supply pins. Input Power Input Input Input Input Pullup Selects between the PLL and cr ystal inputs as the input to the dividers. When HIGH, selects PLL. When LOW, selects XTAL1, XTAL2. LVCMOS / LVTTL interface levels. Analog supply pin. Cr ystal oscillator interface. XTAL1 is the input. XTAL2 is the output. Active High Master Reset. When logic HIGH, the internal dividers are reset causing the true outputs Qx to go low and the inver ted outputs Pulldown nQx to go high. When logic LOW, the internal dividers and the outputs are enabled. LVCMOS / LVTTL interface levels. Pulldown Feedback frequency select pin. LVCMOS / LVTT.


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