Octal T1/E1/J1 Line Interface Evaluation Board
Socketed CS61884 Octal Line Interface
Binding post connectors for power and line
Components supplied for all operational
modes E1 75 Ω, E1 120 Ω and T1/J1 100 Ω
Socketed termination circuitry for easy
Connector for IEEE 1149.1 JTAG Boundary
LED Indicators for Loss of Signal (LOS) and
Supports Hardware, Serial, and Parallel
Easy-to-use evaluation software
On-board socketed reference clock
The CS61884 evaluation board is used to demostrate
the functions of a CS61884 Octal Line Interface Unit in
either E1 75 Ω, E1 120 Ω, or T1/J1 100 Ω applications.
The evaluation board can be operated in either Hard-
ware Mode or Host Mode. In Hardware Mode, switches
and bed stake headers are used to control the line con-
figuration and channel operations for all eight channels.
In Host Mode (Serial or Parallel), the evaluation soft-
ware, switches, and bed stake headers are used to
control the line configuration and operating mode set-
tings for each channel.
In both Hardware and Host modes, the board may be
configured for E1 75 Ω, E1 120 Ω, or T1/J1 100 Ω oper-
ating modes. In both modes binding post connectors
provide easy connections between the line interface
connections of the CS61884 and any E1/T1 analyzing
equipment, which may be used to evaluate the CS61884
device. Bed stake headers allow easy access to each
channel’s clock and data I/O digital interface.
Eight LED indictors display the Loss of Signal (LOS)
conditions for each channel during Hardware and Host
modes. An LED indictor is used on the Interrupt pin to
indicate a change of state.
CS61884-IQ -40° to 85° C
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
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©Copyright Cirrus Logic, Inc. 2002
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