Octal E1 Line Interface Evaluation Board
z Socketed CS61880 Octal Line Interface Unit
z Binding post connectors for power and line
z Components supplied for all operational
modes E1 75 Ω and E1 120 Ω
z Socketed termination circuitry for easy
z Connector for IEEE 1149.1 JTAG Boundary
z LED Indicators for Loss of Signal (LOS) and
z Supports Hardware, Serial, and Parallel Host
z Easy-to-use evaluation software
z On-board socketed reference clock oscillator
The CS61880 evaluation board is used to demonstrate
the functions of a CS61880 Octal Line Interface Unit in
either E1 75 Ω or E1 120 Ω.
The evaluation board can be operated in either Hard-
ware mode or Host mode. In Hardware mode, switches
and bed stake headers are used to control the line con-
figuration and channel operations for all eight channels.
In Host mode (Serial or Parallel), the evaluation soft-
ware, switches, and bed stake headers are used to
control the line configuration and operating mode set-
tings for each channel.
In both Hardware and Host modes, the board may be
configured for E1 75 Ω or E1 120 Ω operating modes. In
both modes binding post connectors provide easy con-
nections between the line interface connections of the
CS61880 and any E1 analyzing equipment, which may
be used to evaluate the CS61880 device. Bed stake
headers allow easy access to each channel’s clock and
data I/O digital interface.
Eight LED indictors display the Loss of Signal (LOS)
conditions for each channel during Hardware and Host
modes. An LED indictor is used on the Interrupt pin to in-
dicate a change of state.
Note: Click on any text in blue to go to cross-references
CS61880-IQ -40° to 85° C
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
Copyright Cirrus Logic, Inc. 2002
(All Rights Reserved)