Document
NCP5214
2−in−1 Notebook DDR Power Controller
The NCP5214 2−in−1 Notebook DDR Power Controller is specifically designed as a total power solution for notebook DDR memory system. This IC combines the efficiency of a PWM controller for the VDDQ supply with the simplicity of linear regulators for the VTT termination voltage and the buffered low noise reference. This IC contains a synchronous PWM buck controller for driving two external NFETs to form the DDR memory supply voltage (VDDQ). The DDR memory termination regulator output voltage (VTT) and the buffered VREF are internally set to track at the half of VDDQ. An internal power good voltage monitor tracks VDDQ output and notifies the user whether the VDDQ output is within target range. Protective features include soft−start circuitries, undervoltage monitoring of supply voltage, VDDQ overcurrent protection, VDDQ overvoltage and undervoltage protections, and thermal shutdown. The IC is packaged in DFN−22.
Features
• Incorporates VDDQ, VTT Regulator, Buffered VREF • Adjustable VDDQ Output • VTT and VREF Track VDDQ/2 • Operates from Single 5.0 V Supply • Supports VDDQ Conversion Rails from 4.5 V to 24 V • Power−saving Mode for High Efficiency at Light Load • Integrated Power FETs with VTT Regulator Sourcing/Sinking 1.5 A
DC and 2.4 A Peak Current
• Requires Only 20 mF Ceramic Output Capacitor for VTT • Buffered Low Noise 15 mA VREF Output • All External Power MOSFETs are N−channel • <5.0 mA Current Consumption During Shutdown • Fixed Switching Frequency of 400 kHz • Soft−start Protection for VDDQ and VTT • Undervoltage Monitor of Supply Voltage • Overvoltage Protection and Undervoltage Protection for VDDQ • Short−circuit Protection for VDDQ and VTT • Thermal Shutdown • Housed in DFN−22 • This is a Pb−Free Device
Typical Applications
• Notebook DDR/DDR2 Memory Supply and Termination Voltage • Active Termination Busses (SSTL−18, SSTL−2, SSTL−3)
http://onsemi.com
MARKING DIAGRAM
1
22 DFN−22
MN SUFFIX
NCP5214
CASE 506AF
AWLYYWW
1G
NCP5214 = Specific Device Code A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb−Free Package
PIN CONNECTIONS
VDDQEN VTTEN FPWM SS
VTTGND VTT VTTI
FBVTT AGND DDQREF VCCA
(Top View)
PGND BGDDQ VCCP SWDDQ TGDDQ BOOST OCDDQ PGOOD VTTREF FBDDQ COMP
NOTE: Pin 23 is the thermal pad on the bottom of the device.
ORDERING INFORMATION
Device
Package
Shipping†
NCP5214MNR2G DFN−22 2500 Tape & Reel (Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2005
December, 2005 − Rev. 0
1
Publication Order Number: NCP5214/D
VDDQEN VTTEN FPWM
VDDQEN VTTEN FPWM SS
CSS
5VCC
PWRGD VTT 0.9 V, 1.5 A
COUT2 Ceramic 10 mF x2
5VCC
PGOOD VTT
FBVTT VTTGND
VCCA
0.9 V, 15 mA
VREF
VTTREF
DDQREF
NCP5214
CL1 RL1 OCDDQ
BOOST
5VCC
NCP5214
VCCP
TGDDQ SWDDQ BGDDQ PGND1
VIN
4.5 V to 24 V
(Ba.