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ZL50017 1 K Digital Switch
Data Sheet Features
• 1024 channel x 1024 channel non-blocking digital Time Division Multiplex (TDM) switch at 4.096, 8.192 or 16.384 Mbps 16 serial TDM input, 16 serial TDM output streams Output streams can be configured as bidirectional for connection to backplanes Exceptional input clock cycle to cycle variation tolerance (20 ns for all rates) Per-stream input bit delay with flexible sampling point selection Per-stream output bit and fractional bit advancement Per-channel constant or variable throughput delay for frame integrity and low latency applications Per-channel high impedance output control Per-channel message mode Input clock: 4.096 MHz, 8.192 MHz, 16.384 MHz Input frame pulses:61 ns, 122 ns, 244 ns Control interface compatible with Intel and Motorola 16-bit non-multiplexed buses Ordering Information
ZL50017GAC 256 Ball PBGA Trays ZL50017QCC 256 Lead LQFP Trays ZL50017GAG2 256 Ball PBGA** Trays **Pb Free Tin/Silver/Copper
January 2006
• • • • • •
-40° C to +85 ° C • • • • Connection memory block programming Supports ST-BUS and GCI-Bus standards for input and output timing IEEE-1149.1 (JTAG) test port 3.3 V I/O with 5 V tolerant inputs; 1.8 V core voltage
Applications
• • • • • • • PBX and IP-PBX Small and medium digital switching platforms Remote access servers and concentrators Wireless base stations and controllers Multi service access platforms Digital Loop Carriers Computer Telephony Integration
VSS RESET ODE
• • • • •
VDD_CORE
VDD_IO
VDD_COREA
VDD_IOA
STi[15:0] FPi CKi MODE_4M0 MODE_4M1
S/P Converter
Data Memory
P/S Converter
STio[15:0] TMS
Test Port
Input Timing
Connection Memory
TDi TDo TCK TRST
Internal Registers &Microprocessor Interface
DS_RD
R/W_WR
A[13:0]
Figure 1 - ZL50017 Functional Block Diagram 1
Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2004-2006, Zarlink Semiconductor Inc. All Rights Reserved.
MOT_INTEL
DTA_RDY
D[15:0]
CS
ZL50017 Description
Data Sheet
The ZL50017 is a maximum 1024 x 1024 channel non-blocking digital Time Division Multiplex (TDM) switch. It has sixteen input streams (STi0 - 15) and sixteen output streams (STio0 - 15). The device can switch 64 kbps and Nx64 kbps TDM channels from any input stream to any output stream. All of the input and output streams operate at the same data rate and can be programmed at any of the following data rates: 2.048 Mbps, 4.096 Mbps, 8.192 Mbps or 16.384 Mbps. The output streams can be configured to operate in bi-directional mode, in which case STi0 - 15 will be ignored. The device contains two types of internal memory - data memory and connection memory. There are three modes of operation - Connection Mode, Message Mode and high impedance mode. In Connection Mode, the contents of the connection memory define, for each output stream and channel, the source stream and channel (the actual data to be output is sto.