NB3N2304NZ

NB3N2304NZ 3.3V 1:4 Clock Fanout Buffer Description The NB3N2304NZ is a low skew 1−to 4 clock fanout buffer, designed for high speed clock distribution such as in PCI−X applications. The NB3N2304NZ guarantees low output−to−output skew. Optimal design, layout and processing minimizes skew within a device and from device−to−device. The Output Enable (OE) pin forces the outputs LOW when LOW. Features Input/Output Clock Frequency up to 140 MHz Low Skew Outputs (100 ps) Output Enable Operating Range: VDD = 3.0 V to 3.6 V Ideal for PCI−X and networking clocks Packaged in 8−pin TSSOP, 4.4 mm x 3 mm Industrial Temperature Range These are Pb−Free Devices* http://onsemi.com MARKING DIAGRAM* TSSOP−8 DT SUFFIX CASE 948S 40N YWW AG 6O M 1 DFN8 MN SUFFIX CASE 506AA 14 A = Assembly Location Y = Year WW = Work Week M = Date Code G = Pb−Free Package *For additional marking information, refer to Application Note AND8002/D. Figure 1. Simplified Logic Diagram ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2009 October, 2009 − Rev. 6 1 Publication Order Number: NB3N2304NZ/D OE Logic Control Q1 Q2 IN Q3 Q4 Figure 2. Block Diagram NB3N2304NZ IN OE Q1 GND 1 2 3 4...