AHA3580

www.DataSheet4U.com comtech aha corporation PRODUCT BRIEF * AHA3580 80 MBYTES/SEC ALDC DATA COMPRESSION COPROCESSOR IC The AHA3580 is a single-chip CMOS lossless compression and decompression integrated circuit. The device implements the ALDC compression algorithm defined by various industry standards. This algorithm is also known as Adaptive Lossless Data Compression. The device compresses, decompresses or passes data through. Flexible interfaces connect directly with various microprocessors and DMA devices used in tape drive systems including SCSI and Fiber Controllers. Content Addressable Memory within the ALDC engine eliminates external SRAMs typically required for dictionary storage in a compression system. APARITY[0] ADATA[8] ADATA[9] ADATA[10] ADATA[11] ADATA[12] GND VDD ADATA[13] ADATA[14] ADATA[15] ADATA[0] ADATA[1] NC ADBOEN ADATA[2] GND VDD ADATA[3] ADATA[4] ADATA[5] +TIE ADATA[6] ADATA[7] GND FEATURES PERFORMANCE: 80 MBytes/sec data compression, decompression or pass-through rate with a single 80 MHz clock 2:1 average compression ratio A four byte Record Length register allows record lengths up to 4 gigabytes Four byte Record Count register allows multiple record transfers Error checking in decompression mode reportable via an interrupt FLEXIBILITY: Polled or interrupt driven I/O Port A/B DMA interfaces include FAS466, FAS440 and AIC-43C97C Programmable polarity for DMA control signals DMA FIFO access via microprocessor port at Port A Interf...