TMP92CH21FG

TOSHIBA Original CMOS 32-Bit Microcontroller TLCS-900/H1 Series TMP92CH21FG Semiconductor Company Preface Thank you very much for making use of Toshiba microcomputer LSIs. Before use this LSI, refer the section, “Points of Note and Restrictions”. CMOS 32-bit Microcontroller TMP92CH21FG/JTMP92CH21 TMP92CH21 1. Outline and Device Characteristics The TMP92CH21 is a high-speed advanced 32-bit Microcontroller developed for controlling equipment which processes mass data. The TMP92CH21 has a high-performance CPU (900/H1 CPU) and various built-in I/Os. The TMP92CH21FG is housed in a 144-pin flat package. The JTMP92CH21 is a chip form product. Device characteristics are as follows: (1) CPU: 32-bit CPU (900/H1 CPU) Compatible with TLCS-900/L1 instruction code 16 Mbytes of linear address space General-purpose register and register banks Micro DMA: 8 channels (250 ns/4 bytes at fSYS = 20 MHz, best case) (2) Minimum instruction execution time: 50 ns (at fSYS = 20 MHz) (3) Internal memory Internal RAM: 16 Kbytes (can be used for program, data and display memory) Internal ROM: 8 Kbytes (used as boot program) Possible downloading of user program through either USB, UART or NAND flash. (4) External memory expansion Expandable up to 512 Mbytes (shared program/data area) Can simultaneously support 8,- 16- or 32-bit width external data bus ... dynamic data bus sizing Separate bus system (5) Memory controller Chip select output: 4 channels (6) 8-bit timers: 4 channels (7)...