ICS9DB306

www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS9DB306 PCI EXPRESS, JITTER ATTENUATOR Features Six differential LVPECL output pairs 1 differential clock input CLK and nCLK supports the following input types: LVPECL, LVDS, LVHSTL, SSTL, HCSL Maximum output frequency: 140MHz Output skew: 135ps (maximum) Cycle-to-Cycle jitter: 25ps (maximum) RMS phase jitter @ 100MHz, (1.5MHz - 22MHz): 3ps (typical) 3.3V operating supply 0°C to 70°C ambient operating temperature Lead-Free package fully RoHS compliant Industrial temperature information available upon request GENERAL DESCRIPTION The ICS9DB306 is a high performance 1-to-6 ICS Differential-to LVPECL Jitter Attenuator designed HiPerClockS™ for use in PCI Express™ systems. In some PCI Express™ systems, such as those found in desktop PCs, the PCI Express™ clocks are generated from a low bandwidth, high phase noise PLL frequency synthesizer. In these systems, a zero delay buffer may be required to attenuate high frequency random and deterministic jitter components from the PLL synthesizer and from the system board. The ICS9DB306 has 2 PLL bandwidth modes. In low bandwidth mode, the PLL loop BW is about 500kHz and this setting will attenuate much of the jitter from the reference clock input while being high enough to pass a triangular input spread spectrum profile. There is also a high bandwidth mode which sets the PLL bandwidth at 1MHz which will pass more spread spectrum modulation. For serdes which hav...