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MC74AC74 Dataheets PDF



Part Number MC74AC74
Manufacturers Motorola
Logo Motorola
Description DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP
Datasheet MC74AC74 DatasheetMC74AC74 Datasheet (PDF)

www.DataSheet4U.com MC74AC74 MC74ACT74 Dual DĆType Positive EdgeĆTriggered FlipĆFlop The MC74AC74/74ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been p.

  MC74AC74   MC74AC74


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www.DataSheet4U.com MC74AC74 MC74ACT74 Dual DĆType Positive EdgeĆTriggered FlipĆFlop The MC74AC74/74ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input. Asynchronous Inputs: LOW input to SD (Set) sets Q to HIGH level LOW input to CD (Clear) sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on CD and SD makes both Q and Q HIGH • Outputs Source/Sink 24 mA • ′ACT74 Has TTL Compatible Inputs VCC 14 CD2 13 D2 12 CP2 11 SD2 10 Q2 9 Q2 8 DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP N SUFFIX CASE 646-06 PLASTIC CD1 D1 Q1 CP1 S Q D1 1 SD 2 CP2 Q2 D2 C Q D2 2 PIN NAMES D1, D2 CP1, CP2 CD1, CD2 SD1, SD2 Q1, Q1, Q2, Q2 Data Inputs Clock Pulse Inputs Direct Clear Inputs Direct Set Inputs Outputs D SUFFIX CASE 751A-03 PLASTIC 1 CD1 2 D1 3 CP1 4 SD1 5 Q1 6 Q1 7 GND LOGIC SYMBOL TRUTH TABLE (Each Half) Inputs SD L H L H H H CD H L L H H H CP X X X D X X X H L X Outputs Q H L H H L Q0 Q L H H L H Q0 Q1 SD1 D1 Q1 CD1 CP1 L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW-to-HIGH Clock Transition Q0(Q0) = Previous Q(Q) before LOW-to-HIGH Transition of Clock Q2 SD2 D2 CP2 Q2 CD2 FACT DATA DataSheet 4 U .com 5-1 www.DataSheet4U.com MC74AC74 MC74ACT74 LOGIC DIAGRAM SD D Q CP Q CD Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. MAXIMUM RATINGS* Symbol VCC Vin Vout Iin Iout ICC Tstg Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Sink/Source Current, per Pin DC VCC or GND Current per Output Pin Storage Temperature Value –0.5 to +7.0 –0.5 to VCC +0.5 –0.5 to VCC +0.5 ±20 ±50 ±50 –65 to +150 Unit V V V mA mA mA °C * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. RECOMMENDED OPERATING CONDITIONS Symbol VCC Vin, Vout Supply Voltage DC Input Voltage, Output Voltage (Ref. to GND) VCC @ 3.0 V tr, tf Input Rise and Fall Time (Note 1) ′AC Devices except Schmitt Inputs VCC @ 4.5 V VCC @ 5.5 V tr, tf TJ TA IOH IOL Input Rise and Fall Time (Note 2) ′ACT Devices except Schmitt Inputs Junction Temperature (PDIP) Operating Ambient Temperature Range Output Current — High Output Current — Low –40 25 VCC @ 4.5 V VCC @ 5.5 V Parameter ′AC ′ACT Min 2.0 4.5 0 150 40 25 10 ns/V 8.0 140 85 –24 24 °C °C mA mA ns/V Typ 5.0 5.0 Max 6.0 5.5 VCC V Unit V 1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times. FACT DATA DataSheet 4 U .com 5-2 www.DataSheet4U.com MC74AC74 MC74ACT74 DC CHARACTERISTICS 74AC Symbol Parameter VCC (V) TA = +25°C Typ VIH Minimum High Level Input Voltage 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 VOL Maximum Low Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 IIN IOLD IOHD ICC Maximum Input Leakage Current †Minimum Dynamic Output Current Maximum Quiescent Supply Current 5.5 5.5 5.5 5.5 4.0 0.002 0.001 0.001 1.5 2.25 2.75 1.5 2.25 2.75 2.99 4.49 5.49 74AC TA = –40°C to +85°C Unit Conditions Guaranteed Limits 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.56 3.86 4.86 0.1 0.1 0.1 0.36 0.36 0.36 ±0.1 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.46 3.76 4.76 0.1 0.1 0.1 0.44 0.44 0.44 ±1.0 75 –75 40 V VOUT = 0.1 V or VCC – 0.1 V VOUT = 0.1 V or VCC – 0.1 V IOUT = –50 µA V *VIN = VIL or VIH –12 mA IOH –24 mA –24 mA IOUT = 50 µA V *VIN = VIL or VIH 12 mA IOL 24 mA 24 mA VI = VCC, GND VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND VIL Maximum Low Level Input Voltage V VOH Minimum High Level Output Voltage V V µA mA mA µA * All outputs loaded; thresholds on input associated with output under test. † Maximum test duration 2.0 ms, one output loaded at a time. Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC. AC CHARACTERISTICS (For Figures and Waveforms — See Section 3) 74AC Symbol Parameter VCC* (V) Min fmax tPLH tPHL tPLH tPHL Maximum Clock Frequency Propagation Delay CDn or SDn to Qn or Qn Propagation Delay CDn or SDn to Qn or Qn Propagation Delay CPn to Qn or Qn Propagation Delay CPn to Qn or Qn 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 100 140 5.0 3.5 4.0 3.0 4.5 3.5 3.5 2.5 TA = +25°C CL = 50 pF Typ 125 16.


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