TBS6416B4E

www.DataSheet4U.com M.tec 1M x 16Bit x 4 Banks synchronous DRAM TBS6416B4E GENERAL DESCRIPTION The TBS6416B4E is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 1,048,576 words by 16 bits, fabricated with M’tec high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications. FEATURES JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four-banks operation MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave) All inputs are sampled at the positive going edge of DataSheet4U.com the system clock. Burst read single-bit write operation DQM for masking Auto & self refresh 64ms refresh period (4K cycle) DataSh ee ORDERING INFORMATION Part No. TBS6416B4E-7G Max Freq. 143MHz Interface LVTTL Package 54 TSOP(II) DataSheet4U.com Revision_1.1 1 Sep. 2000 DataSheet 4 U .com www.DataSheet4U.com M.tec PIN CONFIGURATION (Top View) TBS6416B4E m et4U.co DataSheet4U.com DataSh ee 54Pin TSOP (II) (400mil x 875mil) (0.8 mm Pin pitch) DataSheet4U.com Revision_1.1 2 Sep. 2000 4e DataShe U t. c o m www.DataSheet4U.com M.tec PIN FUNCTIO...