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TC74AC175P

Toshiba Semiconductor

Quad D-Type Flip-Flop

TC74AC175P/F/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74AC175P, TC74AC175F, TC74AC175FT Quad D-Ty...


Toshiba Semiconductor

TC74AC175P

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Description
TC74AC175P/F/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74AC175P, TC74AC175F, TC74AC175FT Quad D-Type Flip Flop with Clear The TC74AC175 is an advanced high speed CMOS QUAD D-TYPE FLIP FLOP fabricated with silicon gate and double-layer metal wiring C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. These four flip-flops are controlled by a clock input (CK) and a clear input ( CLR ). The information data applied to the D inputs (D1 thru D4) are transferred to the outputs (Q1 thru Q4 and Q1 thru Q4 ) on the positive-going edge of the clock pulse. Reset function is accomplished when the clear input is taken low, and all Q outputs are kept in low level regardless of other input conditions. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features High speed: fmax = 170 MHz (typ.) at VCC = 5 V Low power dissipation: ICC = 8 μA (max) at Ta = 25°C High noise immunity: VNIH = VNIL = 28% VCC (min) Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines. Balanced propagation delays: tpLH ∼− tpHL Wide operating voltage range: VCC (opr) = 2 to 5.5 V Pin and function compatible with 74F175 TC74AC175P TC74AC175F TC74AC175FT Weight DIP16-P-300-2.54A SOP16-P-300-1.27A TSSOP16-P-0044-0.65A : 1.00 g (typ.) : 0.18 g (typ.) : 0.06 g (typ.) Start of commercial p...




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