AD7760

www.DataSheet4U.com 2.5 MSPS, 20-Bit Σ∆ ADC Preliminary Technical Data FEATURES High performance 20-bit Sigma-Delta ADC 118dB SNR at 78kHz output data rate 100dB SNR at 2.5MHz output data rate 2.5 MHz maximum fully filtered output word rate Programmable over-sampling rate (8x to 256x) Flexible parallel interface Fully differential modulator input On-chip differential amplifier for signal buffering Low pass FIR filter with default or user programmable coefficients Over-range alert bit Digital offset and gain correction registers Filter bypass modes Low power and power down modes Synchronization of multiple devices via SYNC pin VIN- VIN+ AD7760 FUNCTIONAL BLOCK DIAGRAM AVDD1 AVDD2 AVDD3 AVDD4 DECAP RBIAS AGND Programmable Decimation Control Logic, I/O and Registers FIR Filter Engine VDRIVE DVDD DGND DIFF VREF+ + BUF - Multi-Bit Sigma-Delta Modulator Reconstruction AD7760 MCLK MCLK SYNC RESET RD/WR DRD Y CS DB0 - DB15 Figure 1. APPLICATIONS Data acquisition systems Vibration analysis Instrumentation DataShee DataSheet4U.com PRODUCT OVERVIEW The AD7760 high performance 20-bit sigma delta analog to digital converter combines wide input bandwidth and high speed with the benefits of sigma delta conversion with performance of 100dB SNR at 2.5MSPS making it ideal for high speed data acquisition. Wide dynamic range combined with significantly reduced anti-aliasing requirements simplify the design process. An integrated buffer to drive the reference, a differential ampli...