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ICS94236 Dataheets PDF



Part Number ICS94236
Manufacturers Integrated Circuit System
Logo Integrated Circuit System
Description Programmable System Clock Chip
Datasheet ICS94236 DatasheetICS94236 Datasheet (PDF)

www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS94236 Programmable System Clock Chip for AMD - K7™ processor Recommended Application: VIA KX/KT133 style chipset Output Features: • 1 - Differential pair open drain CPU clocks • 1 - CPU clock @ 3.3V • 13 - SDRAM @ 3.3V • 6 - PCI @3.3V, • 1 - 48MHz, @3.3V fixed. • 1 - 24/48MHz @ 3.3V • 2 - REF @3.3V, 14.318MHz. Features: • Programmable ouput frequency. • Programmable ouput rise/fall time. • Programmable PCI_F and PCICLK skew. • Spread spe.

  ICS94236   ICS94236


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www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS94236 Programmable System Clock Chip for AMD - K7™ processor Recommended Application: VIA KX/KT133 style chipset Output Features: • 1 - Differential pair open drain CPU clocks • 1 - CPU clock @ 3.3V • 13 - SDRAM @ 3.3V • 6 - PCI @3.3V, • 1 - 48MHz, @3.3V fixed. • 1 - 24/48MHz @ 3.3V • 2 - REF @3.3V, 14.318MHz. Features: • Programmable ouput frequency. • Programmable ouput rise/fall time. • Programmable PCI_F and PCICLK skew. • Spread spectrum for EMI control typically by 7dB to 8dB, with programmable spread percentage. • Watchdog timer technology to reset system if over-clocking causes malfunction. • Uses external 14.318MHz crystal. • FS pins for frequency select Pin Configuration VDDREF REF0 GND X1 X2 VDDPCI 1 FS4/PCICLK_F **FS3/PCICLK0 GND *SEL24_48#/PCICLK1 PCICLK2 PCICLK3 PCICLK4 VDDPCI BUFFER IN GND SDRAM11 SDRAM10 VDDSDR SDRAM9 SDRAM8 GND SDATA SCLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 REF1/FS2** GND CPUCLK GND CPUCLKC0 CPUCLKT0 VDDCPU PD#* SDRAM_OUT GND SDRAM0 SDRAM1 VDDSDR SDRAM2 SDRAM3 GND SDRAM4 SDRAM5 VDDSDR SDRAM6 SDRAM7 VDD48 48MHz/FS0* 24/48MHz/FS1** 48-Pin 300mil SSOP * ** 1 Internal Pull-up Resistor of 120K to VDD. Internal Pull-down Resistor of 120K to GND. Internal Pull-down Resistor of 60K to GND. Block Diagram PLL2 /2 X1 X2 XTAL OSC PLL1 Spread Spectrum 48MHz 24_48MHz Functionality FS3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 FS2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 FS1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 FS0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 CPU (MHz) 95.00 100.00 102.00 105.00 110.00 113.00 115.00 120.00 133.33 135.00 137.00 139.00 141.00 143.00 145.00 150.00 PCICLK (MHz) 31.67 33.33 34.00 35.00 36.67 37.67 38.33 40.00 33.33 33.75 34.25 34.75 35.25 35.75 36.25 37.50 REF (1:0) CPUCLK CPU DIVDER CPUCLKC0 CPUCLKT0 SEL24_48# SDATA SCLK FS (4:0) PD# Control Logic Config. Reg. PCI DIVDER PCICLK (4:0) PCICLK_F SDRAM DRIVER SDRAM (11:0) SDRAM_OUT BUFFER IN www.DataSheet4U.com 0451A—01/10/03 * 16 additional frequency selectables via FS4, refer to page5 for frequency table. ICS94236 www.DataSheet4U.com ICS94236 General Description The ICS94236 is a main clock synthesizer chip for AMD-K7 based systems with VIA style chipset. This provides all clocks required for such a system. The ICS94236 belongs to ICS new generation of programmable system clock generators. It employs serial programming I2C interface as a vehicle for changing output functions, changing output frequency, configuring output strength, configuring output to output skew, changing spread spectrum amount, changing group divider ratio and dis/ enabling individual clocks. This device also has ICS propriety 'Watchdog Timer' technology which will reset the frequency to a safe setting if the system become unstable from over clocking. Pin Descriptions PIN NUMBER 1 2 3,9,16,22, 33,39,45, 47 4 5 6,14 7 FS4 2 8 10 11, 12, 13 15 17, 18, 20, 21, 28, 29, 31, 32, 34, 35,37,38 19,30,36 23 24 25 26 27 40 41 42 43 44 46 48 FS3 PCICLK0 SEL24_48#1, 2 PCICLK1 PCICLK(2:4) BUFFER IN SDRAM (11:0) VDDSDR SDATA SCLK 24_48MHz FS1 2 48MHz FS0 2 VDD48 SDRAM_OUT PD#1, 2 VDDCPU CPUCLKT0 CPUCLKC0 CPUCLK REF1 FS22 2 P I N NA M E VDDREF REF0 GND X1 X2 VDDPCI PCICLK_F TYPE PWR OUT PWR IN OUT PWR OUT IN IN OUT IN OUT OUT IN OUT PWR IN IN OUT IN OUT IN PWR OUT IN PWR OUT OUT OUT OUT IN DESCRIPTION REF, XTAL power supply, nominal 3.3V 14.318 Mhz reference clock.This REF output is the STRONGER buffer for ISA BUS loads Ground Crystal input, has internal load cap (36pF) and feedback resistor from X2 Crystal output, nominally 14.318MHz. Has internal load cap (36pF) Supply for PCICLK_F and PCICLK, nominal 3.3V Free running PCI clock not affected by PCI_STOP# for power management. Pin 17, pin 18 function select pin, 1=Desktop Mode, 0=Mobile Mode. Latched Input. Frequency select pin. Latched Input. Internal Pull-down to GND PCI clock output Logic input to select 24 or 48MHz for pin 25 output PCI clock output. PCI clock outputs. Input to Fanout Buffers for SDRAM outputs. SDRAM clock outputs, Fanout Buffer outputs from BUFFER IN pin (controlled by chipset). Supply for SDRAM nominal 3.3V. Data input for I2C serial input, 5V tolerant input Clock input of I2C input, 5V tolerant input 24MHz/48MHz clock output Frequency select pin. Latched Input. 48MHz output clock Frequency select pin. Latched Input Power for 24 & 48MHz output buffers and fixed PLL core. Reference clock for SDRAM zero delay buffer Powers down chip, active low Supply for CPU clock 3.3V "True" clocks of differential pair CPU outputs. These open drain outputs need an external 1.5V pull-up. "Complementory" clocks of differential pair CPU outputs. These open drain outputs need an external 1.5V pull-up. 3.3V CPU clock output powered by VDDCPU 14.318 MHz reference clock. Frequency select pin. Latched Input Notes: www.DataSheet4U.com 1: Internal Pull-up Resistor of .


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