Document
ST62T55C ST62T65C/E65C
8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, SAFE RESET, AUTO-RELOAD TIMER, EEPROM AND SPI
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3.0 to 6.0V Supply Operating Range 8 MHz Maximum Clock Frequency -40 to +125°C Operating Temperature Range Run, Wait and Stop Modes 5 Interrupt Vectors Look-up Table capability in Program Memory Data Storage in Program Memory: User selectable size Data RAM: 128 bytes Data EEPROM: 128 bytes (none on ST62T55C) User Programmable Options 21 I/O pins, fully programmable as: – Input with pull-up resistor – Input without pull-up resistor – Input with interrupt generation – Open-drain or push-pull output – Analog Input 8 I/O lines can sink up to 30mA to drive LEDs or TRIACs directly 8-bit Timer/Counter with 7-bit programmable prescaler 8-bit Auto-reload Timer with 7-bit programmable prescaler (AR Timer) Digital Watchdog Oscillator Safe Guard Low Voltage Detector for Safe Reset 8-bit A/D Converter with 13 analog inputs 8-bit Synchronous Peripheral Interface (SPI) On-chip Clock oscillator can be driven by Quartz Crystal Ceramic resonator or RC network User configurable Power-on Reset One external Non-Maskable Interrupt ST626x-EMU2 Emulation and Development System (connects to an MS-DOS PC via a parallel port)
PDIP28
PS028
SS0P28
CDIP28W
(See end of Datasheet for Ordering Information)
DEVICE SUMMARY
DEVICE ST62T55C ST62T65C ST62E65C OTP
(Bytes)
3884 3884
EPROM (Bytes) 3884
EEPROM 128 128
Rev. 2.9
July 2001 1/86
Table of Contents
Document Page
ST62T55C ST62T65C/E65C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1 GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.2 PIN DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.3 MEMORY MAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.3.2 Program Space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.3.3 Data Space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.3.4 Stack Space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.3.5 Data Window Register (DWR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.3.6 Data RAM/EEPROM Bank Register (DRBR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 1.3.7 EEPROM Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .