STA001

STA001 RF FRONT-END FOR DIGITAL RADIO PRODUCT PREVIEW s s s s s s s s s s s s SINGLE CHIP RECEIVER FOR SATELLITE DIGITAL TRANSMISSION SUPERHETERODYNE RECEIVER WITH IF OUTPUT HIGH INPUT INTERCEPT POINT, LOW MIXER NOISE 54dB IF VGA GAIN RANGE ADJUSTABLE RF GAIN ADJUSTABLE IF GAIN INTEGRATED RF VCO INTEGRATED IF VCO INTEGRATED SYNTHESIZER I2CBUS COMPATIBLE PROGRAMMING INTERFACE UNREGULATED 2.7 V TO 3.3V VOLTAGE SUPPLY LOW COST EXTERNAL COMPONENTS DESCRIPTION The STA001 is an RF IC using STMicroelectronics BLOCK DIAGRAM PADJ1, PADJ2 VDD1 SUPPLY1 :RF VSS1 LNI, NLNI LNA FLT1 TK 1, NTK1 w w w VCO t a .D CE RF MIXER CHARGE PUMP :363.625- 373.75 S a IF1 BUFFER e h AGC1, AGC2 VGA HSB2 High Speed Bipolar Technology for one chip solution for the Starman digital satellite radio receiver. The STA001 is assembled in a TQFP44 package. The frontend architecture is a double conversion receiver (see block diagram) . The chip includes all the RF functions up to low IF and manages the signals to and from the baseband. U 4 t e GADJ1, GADJ2 TQFP44 ORDERING NUMBER: STA001 .c m o SIP, SIN SOP, SON SUPPLY4 :IF1, IF2 &PLL2 IF1 to IF2 MIXER IF2 BUFFER VDD4 VSS4 RXI, NRXI 1.8366 Mhz FLT2 TK2, NTK2 1338.14 - 1375.4 MHz 117.0806 MHz 113.23KHz 1st PLL 3.68MHz PHASE DETECTOR PHASE DETECTOR CHARGE PUMP VCO : 1034 DIFFERENTIAL SINGLE ENDED ENRFOSC LOCK DETECTOR :130 :4 2nd PLL TLCK 14.72MHz BUFFER M_CLK VDD2 VSS2 SUPPLY2 :PLL1 + Crystal osc . MUX I2CBUS INTERFACE OSC SUP...