Document
S a • Independent at References • 4 Independent 2-Quadrant Multiplying 8-Bit DACs D (+10 • Dual.Positive V and +5 V) Supplies or Dual (+5 V) Supplies Capability w •w High Speed: 12.5 MHz Digital Clock Rate w – – V V Settling Time: 150ns to 8–bit
FEATURES
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MP7652
4-Channel Voltage Output 15 MHz, Input Bandwidth, 8-Bit Multiplying DACs with 3-Wire Serial Digital Port and Independent References
• Low Harmonic Distortion: 0.25% typical with VREF = 1 V p-p @ 1 MHz • VREF/2 Output Preset Level • Latch-Up Free • ESD Protection: 2000 V Minimum
APPLICATIONS
• • • • • •
(typ) – Voltage Reference Input Bandwidth: 15 MHz Low Power: 80mW Low AC Voltage Reference Feedthrough Excellent Channel-to-Channel Isolation DNL = +0.5 LSB, INL = +1 LSB (typ) DACs Matched to +0.5% (typ) Very Low Noise
• Direct High-Frequency Automatic Gain Control • Video AGC & CCD Level AGC • Convergence Adjustment for High-Resolution Monitors (Workstations)
GENERAL DESCRIPTION
The MP7652 is ideal for digital gain control of high frequency analog signals such as video, composite video, CCD and others. The device includes 4-channels of high speed, wide bandwidth, two quadrant multiplying, 8-bit accurate digital-toanalog converter. It includes an output drive buffer per channel capable of driving a +1mA (typ) load. DNL of better than +0.5 LSB is achieved with a channel-to-channel matching of typically 0.5%. Stability, matching, and precision of the DACs are achieved by using MPS’ thin film technology. Also, excellent channel-to-channel isolation is achieved with EXAR’s BiCMOS process which cannot be achieved using a typical CMOS technology. An open loop architecture (patent pending) provides wide
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Temperature Range
–40 to +85°C –40 to +85°C
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small signal bandwidth from VREF to output up to 15 MHz (typ), fast output settling time of 150 ns, and excellent VREF feedthrough isolation. The bottom of each DAC reference string is brought out separately for totally isolated operation. In addition, low distortion in the order of 0.25% with a 1 V p-p, 1 MHz signal is achieved. The combination of a constant input Z and the ability to vary VREFN within VCC –1.8 and VEE +1.5 V allows flexibility for optimum system design. The MP7652 is fabricated on a junction isolated, high speed BiCMOS (BiCMOS IVTM) process with thin film resistors. This process enables precision high speed analog/digital (mixedmode) circuits to be fabricated on the same chip.
ORDERING INFORMATION
Package Type
Part No.
MP7652AS MP7652AN
INL (LSB)
+1 +1
DNL (LSB)
+0.5 +0.5
Gain Error (% FSR)
Plastic Dip
Rev. 1.00 1
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MP7652
SIMPLIFIED BLOCK DIAGRAM
VDD VCC VEE
PRESET LATCH1 VDD DAC1
VREFP1 VOUT1 VREFN1 VREFP2 LATCH2 DAC1 VOUT2 VREFN2 VREFP3 LATCH3 DAC1 VOUT3 VREFN3 VREFP4 LATCH4 DAC1 VOUT4 VREFN4
LD 2 to 4 Decoder SDO SDI CLK
EN D Q D Q DB0 to DB7 A0 A1 X X 12-BIT SHIFT REGISTER
DGND
Rev. 1.00 2
MP7652
PIN CONFIGURATIONS
N/C N/C VDD VCC VEE DGND VREFN1 VOUT1 VREFP1 VREFP2 VOUT2 VREFN2
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
N/C PRESET LD CLK SDO SDI VREFN4 VOUT4 VREFP4 VREFP3 VOUT3 VREFN3
N/C N/C VDD VCC VEE DGND VREFN1 VOUT1 VREFP1 VREFP2 VOUT2 VREFN2
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
N/C PRESET LD CLK SDO SDI VREFN4 VOUT4 VREFP4 VREFP3 VOUT3 VREFN3
24 Pin PDIP (0.300”) NN24
24 Pin SOIC (Jedec, 0.300”) S24
PIN OUT DEFINITIONS
PIN NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 NAME N/C N/C VDD VCC VEE DGND VREFN1 VOUT1 VREFP1 VREFP2 VOUT2 VREFN2 VREFN3 DESCRIPTION No Connection No Connection Digital Positive Supply Analog Positive Supply Analog Negative Supply Digital Ground DAC 1 Negative Reference Input DAC 1 Output DAC 1 Positive Reference Input DAC 2 Positive Reference Input DAC 2 Output DAC 2 Negative Reference Input DAC 3 Negative Reference Input 24 N/C PIN NO. 14 15 16 17 18 19 20 21 22 23 NAME VOUT3 VREFP3 VREFP4 VOUT4 VREFN4 SDI SDO CLK LD PRESET DESCRIPTION DAC 3 Output DAC 3 Positive Reference Input DAC 4 Positive Reference Input DAC 4 Output DAC 4 Negative Reference Input Serial Data and Address Input Serial Data Output Shift Register Clock Input Load Data to Selected DAC Preset all DACs to 1/2 (VREF – VREFN). PRESET is internally connected to VDD through 300 kΩ. No Connection
Rev. 1.00 3
MP7652
ELECTRICAL CHARACTERISTICS TABLE FOR DUAL SUPPLIES
Unless Otherwise Noted: VDD = 5 V, VCC = +5 V, VEE = –5 V, VREFP = 3 V and –3 V, T = 25°C, Output Load = Open, DGND=VREFN = 0 V
Parameter DC CHARACTERISTICS Resolution (All Grades) Differential Non-Linearity Integral Non-Linearity Monotonicity Gain Error Zero Scale Offset Output Drive Capability REFERENCE/INV INPUTS Impedance of VREF Voltage Range VREFN DC Voltage Range REF VR INV Pos. INV Neg. 6 VEE +1.5 VO VEE + 1 18 VCC –1.8 kΩ V V V N DNL INL GE ZOFS IO +1 8 +0.8 +1 Guaranteed +1.5 +50 % FSR mV mA FSR = Full Scale Range1 Bits LSB LS.