AT49LD3200B

Features 3.0V to 3.6V Read/Write Burst Read Performance w – <100 MHz (RAS Latency = 2, CAS Latency = 6), 10 ns Cycle Time tSAC = 7 ns – <75 MHz (RAS Latency = 2, CAS Latency = 5), 13 ns Cycle Time tSAC = 8 ns – <50 MHz (RAS Latency = 1, CAS Latency = 4), 20 ns Cycle Time tSAC = 9 ns MRS Cycle with Address Key Programs – RAS Latency (1 and 2) – CAS Latency (2 ~ 8) – Burst Length: 4, 8 – Burst Type: Sequential and Interleaved Word Selectable Organization – 16 (Word Mode)/x 32 (Double Word Mode) Sector Erase Architecture – Eight 256K Word or 128K Double Word (4-Mbit) Sectors Independent Asynchronous Boot Block – 8K x 16 Bits with Hardware Lockout Fast Program Time – 3-volt, 100 µs per Word/Double Word Typical – 12-volt, 30 µs per Word/Double Word Typical Fast Sector Erase Time – 2.5 Seconds at 3 Volts – 1.6 Seconds at 12 Volts Low-power Operation – ICC Read = 75 mA Typical Input and Output Pin Continuity Test Mode Optimizes Off-board Programming Package: – 86-pin TSOP Type II with Off-center Parting Line (OCPL) for Improved Reliability LVTTL-compatible Inputs and Outputs w w .D at h S a t e e 4U . m o c Description The AT49LD3200 or AT49LD3200B SFlash™ is a synchronous, high-bandwidth Flash memory fabricated with Atmel’s high-performance CMOS process technology and is organized either as 2,097,152 x 16 bits (word mode) or as 1,048,576 x 32 bits (double word mode), depending on the polarity of the WORD pin (see Pin Function Description Table...