ADSP-21991

m o .c U 4 t e e h S a at .D w w w a Mixed Signal DSP Controller ADSP-21991 Three Phase 16-Bit Center Based PWM Generation Unit with 12.5 ns Resolution at 160 MHz Core Clock (CCLK) Rate Dedicated 32-Bit Encoder Interface Unit with Companion Encoder Event Timer Dual 16-Bit Auxiliary PWM Outputs 16 General-Purpose Flag I/O Pins Three Programmable 32-Bit Interval Timers SPI Communications Port with Master or Slave Operation Synchronous Serial Communications Port (SPORT) Capable of Software UART Emulation Integrated Watchdog Timer Dedicated Peripheral Interrupt Controller with Software Priority Control Multiple Boot Modes Precision 1.0 V Voltage Reference KEY FEATURES ADSP-219x, 16-Bit, Fixed Point DSP Core with up to 160 MIPS Sustained Performance 40K Words of On-Chip RAM, Configured as 32K Words On-Chip 24-Bit Program RAM and 8K Words On-Chip 16-Bit Data RAM External Memory Interface Dedicated Memory DMA Controller for Data/Instruction Transfer between Internal/External Memory Programmable PLL and Flexible Clock Generation Circuitry Enables Full Speed Operation from Low Speed Input Clocks IEEE JTAG Standard 1149.1 Test Access Port Supports On-Chip Emulation and System Debugging 8-Channel, 14-Bit Analog-to-Digital Converter System, with up to 20 MSPS Sampling Rate (at 160 MHz Core Clock Rate) JTAG TEST AND EMULATION PWM GENERATION UNIT m o .c U 4 t e e h S a t a .D w w w FUNCTIONAL BLOCK DIAGRAM CLOCK GENERATOR/PLL ADSP-219x DSP CORE 32K ؋ 24 PM RAM 8K ؋16 DM RAM 4K ؋24 PM...