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STLC60135 Dataheets PDF



Part Number STLC60135
Manufacturers ST Microelectronics
Logo ST Microelectronics
Description TOSCA ADSL DMT TRANSCEIVER
Datasheet STLC60135 DatasheetSTLC60135 Datasheet (PDF)

® STLC60135 TOSCA™ ADSL DMT TRANSCEIVER DTM modem for ADSL, compatible with the following standards: – ANSI T1.413 Issue 2 – ITU-T G.992.1 (G.dmt) – ITU-T G.992.2 (G.lite) Same chip for both ATU-C and ATU-R Supports either ATM (Utopia level 1 & 2) or bitstream interface 16 bit multiplexed microprocessor interface (little and big endian compatibility) Analog Front End management Dual latency paths: fast and interleaved ATM’s PHY layer: cell processing (cell delineation, cell insertion, HEC) ADS.

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® STLC60135 TOSCA™ ADSL DMT TRANSCEIVER DTM modem for ADSL, compatible with the following standards: – ANSI T1.413 Issue 2 – ITU-T G.992.1 (G.dmt) – ITU-T G.992.2 (G.lite) Same chip for both ATU-C and ATU-R Supports either ATM (Utopia level 1 & 2) or bitstream interface 16 bit multiplexed microprocessor interface (little and big endian compatibility) Analog Front End management Dual latency paths: fast and interleaved ATM’s PHY layer: cell processing (cell delineation, cell insertion, HEC) ADSL’s overhead management Reed Solomon encode/decode Trellis encode/decode (Viterbi) DMT mapping/ demapping over 256 carriers Fine (2ppm) timing recover using Rotor and Adaptative Frequency Domain Equalizing Time Domain Equalization Front end digital filters 0.35µm HCMOS6 Technology 144 pin PQFP package Power Consumption 1 Watt at 3.3V Figure 1. Block Diagram TEST SIGNALS PQFP144 ORDERING NUMBER: STLC60135 Applications ATU-C: DSLAM, Routers at Central Office ATU-R: Routers at SOHO, stand-alone modems, PC mother boards General Description The STLC60135 is the DMT modem and ATM framer of the STMicroelectronics Tosca™ chipset. When coupled with STLC60134 analog front-end and an external controller running dedicated firmware, the product fulfils ANSI T1.413 “Issue 2” DMT ADSL specification. The STLC60135 may be used at both ends of ADSL loop: ATU-C and ATU-R. The chip supports UTOPIA level 1 and UTOPIA level 2 interface and a non ATM synchronous bit-stream interface. CLOCK TEST MODULE DATA SYMBOL TIMING UNIT VCXO STM AFE INTERFACE DSP FRONT-END FFT/IFFT ROTOR TRELLIS CODING MAPPER/ DEMAPPER GENERIC TC REED/ SOLOMON INTERFACE MODULE UTOPIA AFE CONTROL AFE CONTROL INTERFACE CONTROLLER INTERFACE ATM SPECIFIC TC CONTROLLER BUS GENERAL PURPOSE I/Os D98TL315 September 1999 1/25 STLC60135 The STLC60135 can be splitted up into two different sections. The physical one performs the DMT modulation, demodulation, Reed-Solomon encoding, bit interleaving and 4D trellis coding. The ATM section embodies framing functions for the generic and ATM Transmission Convergence (TC) layers. The generic TC consists of data scrambling and Reed Solomon error corrections, with and without interleaving. The STLC60135 is controlled and programmed by an external controller (ADSL Transceiver Controller, ATC) that sets the programmable coefficients. The firmware controls the initialization phase and carries out the consequent adaptationoperations. ABSOLUTE MAXIMUM RATINGS Symbol VDD Ptot Tamb Parameter Supply Voltage Total Power Dissipation Ambient Temperature 1m/s airflow Min 3.0 -40 Typ 3.3 900 Max 3.6 1400 85 Unit V mW °C Transient Energy Capabilities ESD ESD (Electronic Discharged) tests have been performed for the Human Body Model (HBM) and for the Charged Device Model (CDM). The pins of the device are to be able to withstand minimum 1500V for the HBM and minimum 250V for CDM. Latch-up The maximum sink or source current from any pin is limited to 100mA to prevent latch.


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