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ICS308 Dataheets PDF



Part Number ICS308
Manufacturers Integrated Circuit Systems
Logo Integrated Circuit Systems
Description SERIAL PROGRAMMABLE QUAD PLL VERSACLOCK SYNTHESIZER
Datasheet ICS308 DatasheetICS308 Datasheet (PDF)

ICS308 SERIAL PROGRAMMABLE QUAD PLL VERSACLOCK SYNTHESIZER Description The ICS308 is a versatile serially programmable, quad PLL clock source. The ICS308 can generate any frequency from 250 kHz to 200 MHz, and up to 6 different output frequencies simultaneously. The outputs can be reprogrammed on the fly, and will lock to a new frequency in 10 ms or less. Smooth transitions (in which the clock duty cycle remains roughly 50%) are guaranteed if the output divider is not changed. The device include.

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ICS308 SERIAL PROGRAMMABLE QUAD PLL VERSACLOCK SYNTHESIZER Description The ICS308 is a versatile serially programmable, quad PLL clock source. The ICS308 can generate any frequency from 250 kHz to 200 MHz, and up to 6 different output frequencies simultaneously. The outputs can be reprogrammed on the fly, and will lock to a new frequency in 10 ms or less. Smooth transitions (in which the clock duty cycle remains roughly 50%) are guaranteed if the output divider is not changed. The device includes a PDTS pin which tri-states the output clocks and powers down the entire chip. The ICS308 default for non-programmed start-up are buffered reference clock outputs on all clock output pins. Features • Packaged in 20-pin SSOP (QSOP) • Operating voltage of 3.3 V • Highly accurate frequency generation • M/N Multiplier PLL: M = 1..2048, N = 1..1024 • Serially programmable: user determines the output frequency via a 3-wire interface • Eliminates need for custom quartz oscillators • Input crystal frequency of 5 - 27 MHz • Optional programmable on-chip crystal capacitors • Output clock frequencies up to 200 MHz • Reference clock output • Power down tri-state mode • Very low jitter Block Diagram V DD 3 CLK1 P LL1 CLK2 Divide Logic and Output Enable Control CLK3 CLK4 CLK5 CLK6 CLK7 CLK8 CLK9 STROBE SCLK DATA P LL3 C rystal or clock input X 1/IC LK C rystal O scillator X2 GND 2 P D TS P LL4 P LL2 E xternal capacitors are required w ith a crystal input. MDS 308 F I n t e gra te d C i r c u i t S y s t e m s ● 1 5 25 Race Stre et, San Jo se, CA 9 5126 ● Revision 090704 te l (40 8) 2 97-12 01 ● w w w. i c st . c o m ICS308 SERIAL PROGRAMMABLE QUAD PLL VERSACLOCK SYNTHESIZER Pin Assignment D AT A X2 X1/IC LK C LK9 VDD GND C LK1 C LK2 C LK3 C LK4 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 ST R O BE SC LK PD T S VD D VD D GND C LK5 C LK6 C LK7 C LK8 20 pin (150 m il) SSOP (QSOP) Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Pin Name DATA X2 X1/ICLK CLK9 VDD GND CLK1 CLK2 CLK3 CLK4 CLK8 CLK7 CLK6 CLK5 GND VDD VDD PDTS SCLK STROBE Pin Type Input XO XI Output Power Power Output Output Output Output Output Output Output Output Power Power Power Input Input Input Serial data input. Crystal Output. Connect this pin to a crystal. Float for clock input. Connect this pin to a crystal or external clock input. Output clock 9. Default of Reference frequency output when unprogrammed. Connect to +3.3 V. Connect to Ground. Output clock 1. Default of Reference frequency output when unprogrammed. Output clock 2. Default of Reference frequency output when unprogrammed. Output clock 3. Default of Reference frequency output when unprogrammed. Output clock 4. Default of Reference frequency output when unprogrammed. Output clock 8. Default of Reference frequency output when unprogrammed. Output clock 7. Default of Reference frequency output when unprogrammed. Output clock 6. Default of Reference frequency output when unprogrammed. Output.


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