K4S1G0732B-TC75

SDRAM stacked 1Gb B-die (x8) CMOS SDRAM stacked 1Gb B-die SDRAM Specification Revision 1.1 February 2004 * Samsung Electronics reserves the right to change products or specification without notice. Rev. 1.1 February 2004 SDRAM stacked 1Gb B-die (x8) Revision History Revision 1.0 (August, 2003) - First release. Revision 1.1 (February, 2004) -Corrected typo. CMOS SDRAM Rev. 1.1 February 2004 SDRAM stacked 1Gb B-die (x8) 32M x 8Bit x 4 Banks Synchronous DRAM FEATURES JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8) -. Burst type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock. Burst read single-bit write operation DQM for masking Auto & self refresh 64ms refresh period (8K Cycle) CMOS SDRAM GENERAL DESCRIPTION The K4S1G0732B is 1,073,741,824bits synchronous high data rate Dynamic RAM organized as 4 x 33,554,432 words by 8 bits, fabricated with SAMSUNG's high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications. Ordering Information Part No. K4S1G0732B-TC75 Orgainization st....