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IN74ACT533

IK Semiconductor

Octal D-Type Latch

TECHNICAL DATA IN74ACT533 Octal 3-State Inverting Transparent Latch High-Speed Silicon-Gate CMOS The IN74ACT533 is ide...


IK Semiconductor

IN74ACT533

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TECHNICAL DATA IN74ACT533 Octal 3-State Inverting Transparent Latch High-Speed Silicon-Gate CMOS The IN74ACT533 is identical in pinout to the LS/ALS533, HC/HCT533. The IN74ACT533 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. The data appears as the outputs in inverted form. When Latch Enable goes low, data meeting the setup and hold time becomes latched. The Output Enable input does not affect the state of the latches, but when Output Enable is high, all device outputs are forced to the highimpedance state. Thus, data may be latched even when the outputs are not enabled. TTL/NMOS Compatible Input Levels Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 4.5 to 5.5 V Low Input Current: 1.0 µA; 0.1 µA @ 25°C Outputs Source/Sink 24 mA 3-State Outputs for Bus Interfacing ORDERING INFORMATION IN74ACT533N Plastic IN74ACT533DW SOIC TA = -40° to 85° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs Output Enable Latch Enable H H L D H L X X Output Q L H no change Z w w w .d h s a t a ee . u t4 m o c L L L H X X = don’t care P Z = high impedance IN 20=VCC PIN 10 = GND 1 www.DataSheet4U.com IN74ACT533 MAXIMUM RATINGS* Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Ou...




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