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IN74AC112

Part Number	IN74AC112
Manufacturer	IK Semiconductor
Description	Dual J-K Negative-Edge-Triggered Flip-Flop
Published	Dec 8, 2005
Detailed Description	TECHNICAL DATA IN74AC112 Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74AC112 is identical...
Datasheet	IN74AC112 PDF File

Overview

TECHNICAL DATA IN74AC112 Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74AC112 is identical in pinout to the LS/ALS112, HC/HCT112.
The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs.
Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Reset inputs.
• Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.
0 to 6.
0 V • Low Input Current: 1.
0 µA; 0.
1 µA @ 25°C • High Noise Immunity Characteristic of CMOS Devices • Outputs Source/Sink 24 mA ORDERING INFORMATION IN74AC112N Plastic IN74AC112D SOIC TA = -40° to 85° C for all packages PIN ASSIGNM...

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