MAS3507D

PRELIMINARY DATA SHEET MICRONAS MAS 3507D MPEG 1/2 Layer 2/3 Audio Decoder Edition March 16, 2000 6251-459-3PD MAS 3507D Contents Page 5 5 6 6 6 7 7 7 8 8 8 8 8 9 9 9 9 9 10 11 11 11 12 12 12 13 13 13 13 14 14 15 15 16 Section 1. 1.1. 1.2. 1.2.1. 1.2.2. 2. 2.1. 2.2. 2.3. 2.4. 2.4.1. 2.4.2. 2.4.3. 2.5. 2.6. 2.6.1. 2.6.2. 2.6.3. 2.6.4. 2.7. 2.7.1. 2.7.2. 2.7.3. 2.7.3.1. 2.7.3.2. 2.7.3.3. 2.7.3.4. 2.7.4. 2.7.4.1. 2.7.4.2. 2.7.4.3. 2.8. 2.8.1. 2.9. Title Introduction Features Application Overview Multimedia Mode Broadcast Mode Functional Description of the MAS 3507D DSP Core Firmware (Internal Program ROM) Program Download Feature Baseband Processing Volume Control / Channel Mixer Mute / Bypass Tone Control Bass / Treble Control Clock Management Power Supply Concept Internal Voltage Monitor DC/DC Converter Stand-by Functions Start-up Sequence Interfaces MPEG Bit Stream Interface (SDI) SDI* Selection Parallel Input Output Interface (PIO) PIO-DMA Input Mode Writing MPEG Data to the PIO-DMA DMA Handshake Protocol End of DMA Transfer Audio Output Interface (SDO) Mode 1: 16 Bits/Sample(I2S Compatible Data Format) Mode 2:32 Bit/Sample (Inverted SOI) Other Output Modes Start-up Configuration Parallel Input Output Interface (PIO) Status Pins in SDI Input Mode PRELIMINARY DATA SHEET 2 Micronas PRELIMINARY DATA SHEET MAS 3507D Contents, continued Page 18 18 18 19 19 20 20 20 21 21 21 21 22 22 22 22 23 23 23 23 23 24 24 24 24 25 25 25 26 26 28 28 30 30 30 31 32 33 33 34 35 36 37 3...