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ICS950703 Dataheets PDF



Part Number ICS950703
Manufacturers Integrated Circuit Systems
Logo Integrated Circuit Systems
Description Programmable Timing Control Hub
Datasheet ICS950703 DatasheetICS950703 Datasheet (PDF)

Integrated Circuit Systems, Inc. ICS950703 Programmable Timing Control HubTM for P4TM Recommended Application: Intel Tehema and Tehema-E Chipsets Output Features: • 4 Differential CPU Clock Pairs @ 3.3V • 2 - 3V MREF clocks for memory reference seeds, (separate single ended but 180 degrees out of phase) • 4 - 66MHz 3V66 output • 10 - 3V 33MHz PCI clocks • 2 - 48MHz clocks (180 degrees out of phase) • 2 - 14.318 reference output (180 degrees out of phase) Key Specifications: • 3V66 Output jitte.

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Integrated Circuit Systems, Inc. ICS950703 Programmable Timing Control HubTM for P4TM Recommended Application: Intel Tehema and Tehema-E Chipsets Output Features: • 4 Differential CPU Clock Pairs @ 3.3V • 2 - 3V MREF clocks for memory reference seeds, (separate single ended but 180 degrees out of phase) • 4 - 66MHz 3V66 output • 10 - 3V 33MHz PCI clocks • 2 - 48MHz clocks (180 degrees out of phase) • 2 - 14.318 reference output (180 degrees out of phase) Key Specifications: • 3V66 Output jitter <300ps • CPU Output Jitter <200ps • MREF Output jitter <250ps Features/Benefits: • QuadRomTM frequency selection. • Programmable asynchronous 3V66/PCI frequency. • Programmable output frequency. • Programmable output divider ratios. • Programmable output rise/fall time. • Programmable output skew. • Programmable spread percentage for EMI control. • Programmable watch dog safe frequency. • Support I2C Index read/write and block read/write operations. • Uses external 14.318MHz reference input. Frequency Table Bit4 Sel133/100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Bit3 FS3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Bit2 FS2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Bit1 FS1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Bit0 FS0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 CPU MHz 90.00 100.00 100.90 103.00 105.00 108.00 110.00 112.00 115.00 118.00 120.00 122.00 125.00 127.00 130.00 133.60 120.00 133.33 133.90 136.00 138.00 140.00 142.00 144.00 145.00 148.00 150.00 152.00 154.00 156.00 158.00 160.00 MREF MHz 45.00 50.00 50.45 51.50 52.50 54.00 55.00 56.00 57.50 59.00 60.00 61.00 62.50 63.50 65.00 66.80 60.00 66.67 66.95 68.00 69.00 70.00 71.00 72.00 72.50 74.00 75.00 76.00 77.00 78.00 79.00 80.00 PCI MHz 30.00 33.33 33.63 34.33 35.00 36.00 36.67 37.33 38.33 39.33 40.00 40.67 41.67 42.33 43.33 44.53 30.00 33.33 33.48 34.00 34.50 35.00 35.50 36.00 36.25 37.00 37.50 38.00 38.50 39.00 39.50 40.00 3V66 MHz 60.00 66.67 67.27 68.67 70.00 72.00 73.33 74.67 76.67 78.67 80.00 81.33 83.33 84.67 86.67 89.07 60.00 66.67 66.95 68.00 69.00 70.00 71.00 72.00 72.50 74.00 75.00 76.00 77.00 78.00 79.00 80.00 Pin Configuration GND 1 MULTSEL0/REF0 2 MULTSEL1/REF1 3 VDDREF 4 X1 5 X2 6 GNDREF 7 PCICLK0 8 PCICLK1 9 VDDPCI 10 PCICLK2 11 GNDPCI 13 PCICLK4 14 PCICLK5 15 VDDPCI 16 PCICLK6 17 **FS2/PCICLK7 18 GNDPCI 19 **FS3/PCICLK8 20 **SEL100_133#/PCICLK9 21 VDDPCI 22 SDATA 23 GND48 24 *FS0/48MHz_0 25 **FS1/48MHz_1 26 AVDD48 27 PD# 28 56-SSOP 56 VDDMREF 55 3VMREF 54 3VMREF_B 53 GNDMREF 52 SCLK 51 CPUCLKT3 50 CPUCLKC3 49 VDDCPU 48 CPUCLKT2 47 CPUCLKC2 46 GNDCPU ICS950703 PCICLK3 12 45 CPUCLKT1 44 CPUCLKC1 43 VDDCPU 42 CPUCLKT0 41 CPUCLKC0 40 GNDCPU 39 IREF 38 AVDD 37 GND 36 VDD3V66 35 3V66_3 34 3V66_2 33 GND3V66 32 GND3V66 31 3V66_1 30 3V66_0 29 VDD3V66 * Internal Pull-Up Resistor ** Internal Pull-Down Resistor 0690D—05/14/04 Integrated Circuit Systems, Inc. ICS950703 General Description The ICS950703 is a single chip clock solution for desktop designs using the Intel Brookdale chipset with Rambus RDRAM memory. It provides all necessary clock signals for such a system. The ICS950703 is part of a whole new line of ICS clock generators and buffers called TCH™ (Timing Control Hub). This part incorporates ICS's newest clock technology which offers more robust features and functionality. Employing the use of a serially programmable I2C interface, this device can adjust the output clocks by configuring the frequency setting, the output divider ratios, selecting the ideal spread percentage, the output skew, the output strength, and enabling/disabling each individual output clock. M/ N control can configure output frequency with resolution up to 0.1MHz increment. This part also provides 128 frequency selections via ICS QuadROMTM technology as an alternate to M/N programming. Block Diagram PLL2 Frequency Dividers 48MHZ (1:0) X1 X2 XTAL REF (1:0) 4 4 CPUCLKT (3:0) CPUCLKC (3:0) PCICLK (9 :0) MREF MREF_B 3V66 (3:0) MULTSEL (1:0) FS (3:0) SEL100_133# SDATA SCLK PD# Control Logic Programmable Spread PLL1 Programmable Frequency Dividers STOP Logic I REF Power Groups Pin Number AVDD 4 27 38 VDD 10, 16, 22 29, 36 43, 49 56 GND 7 24 37 GND 13, 19 32, 33 40, 46 53 Description REF output, Crystal 48MHz fixed, Fixed PLL CPU PLL, CPU Master Clock, -PCI outputs 3V66 outputs CPU Outputs, IREF, MULTSEL MREF outputs 0690D—05/14/04 2 Integrated Circuit Systems, Inc. ICS950703 Pin Description PIN # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 GND MULTSEL0/REF0 MULTSEL1/REF1 VDDREF X1 X2 GNDREF PCICLK0 PCICLK1 VDDPCI PCICLK2 PCICLK3 GNDPCI PCICLK4 PCICLK5 VDDPCI PCICLK6 **FS2/PCICLK7 GNDPCI **FS3/PCICLK8 **SEL100_133#/PCICLK9 VDDPCI SDATA GND48 *FS0/48MHz_0 **FS1/48MHz_1 AVDD48 PD# PIN NAME PIN TYPE DESCRIPTION PWR Ground pin. 3.3V LVTTL input for selection the current multiplier for CPU outputs / 14.318 MHz reference.


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