DatasheetsPDF.com

SY100EL34L Dataheets PDF



Part Number SY100EL34L
Manufacturers Micrel Semiconductor
Logo Micrel Semiconductor
Description CLOCK GENERATION CHIP
Datasheet SY100EL34L DatasheetSY100EL34L Datasheet (PDF)

NOT RECOMMENDED FOR NEW DESIGNS SY10EL34/L SY100EL34/L 5V/3.3V ÷2, ÷4, ÷8 Clock Generation Chip Precision Edge® General Description The SY10/100EL34/L are low-skew ÷2, ÷4, ÷8 clock generation chips designed explicitly for low-skew clock generation applications. The internal dividers are synchronous to each other; therefore, the common output edges are all precisely aligned. The devices can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input.

  SY100EL34L   SY100EL34L



Document
NOT RECOMMENDED FOR NEW DESIGNS SY10EL34/L SY100EL34/L 5V/3.3V ÷2, ÷4, ÷8 Clock Generation Chip Precision Edge® General Description The SY10/100EL34/L are low-skew ÷2, ÷4, ÷8 clock generation chips designed explicitly for low-skew clock generation applications. The internal dividers are synchronous to each other; therefore, the common output edges are all precisely aligned. The devices can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. In addition, by using the VBB output, a sinusoidal source can be ACcoupled into the device. If a single-ended input is to be used, the VBB output should be connected to the CLK input and bypassed to ground via a 0.01µF capacitor. The VBB output is designed to act as the switching reference for the input of the EL34/L under single-ended input conditions. As a result, this pin can only source/ sink up to 0.5mA of current. The common enable ( EN ) is synchronous so that the internal dividers will only be enabled/disabled when the internal clock is already in the LOW state. This avoids any chance of generating a runt clock pulse on the internal clock when the device is enabled/disabled as can happen with an asynchronous control. An internal runt pulse could lead to losing synchronization between the internal divider stages. The internal enable flip-flop is clocked on the falling edge of the divider stages. The internal enable flipflop is clocked on the falling edge of the input clock; therefore, all associated specification limits are referenced to the negative edge of the clock input. Upon start-up, the internal flip-flops will attain a random state; the master reset (MR) input allows for the synchronization of the internal dividers, as well as for multiple EL34/Ls in a system. Data sheets and support documentation can be found on Micrel’s web site at: www.micrel.com. Features Precision Edge® • 3.3V and 5V power supply options • 50ps output-to-output skew • Synchronous enable/disable • Master Reset for synchronization • Internal 75KΩ input pull-down resistors • Available in 16-pin SOIC package Pin Description Pin Name CLK EN MR VBB Q0 Q1 Q2 Pin Function Differential clock inputs. Synchronous enable. Master reset. Reference output. Differential ÷2 outputs. Differential ÷4 outputs. Differential ÷8 outputs. Precision Edge is a registered trademark of Micrel, Inc. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com December 2011 M9999-120611-I [email protected] or (408) 955-1690 Micrel, Inc. Ordering Information Part Number SY10EL34LZG SY10EL34LZGTR(2) SY100EL34LZG SY100EL34LZGTR(2) SY10EL34ZG SY10EL34ZGTR(2) SY100EL34ZG SY100EL34ZGTR(2) Package Type Z16-2 Z16-2 Z16-2 Z16-2 Z16-2 Z16-2 Z16-2 Z16-2 Operating Range Industrial Industrial Industrial Industrial Industrial Industrial Industrial Industrial Package Marking SY10EL34LZG with Pb-Free Bar Line Indicator SY10EL34LZG with Pb-Free Bar Line Indicator SY100EL34LZG with Pb-Free Bar Line Indicator SY100EL34LZG with Pb-Free Bar Line Indicator SY10EL34ZG with Pb-Free Bar Line Indicator SY10EL34ZG with Pb-Free Bar Line Indicator SY100EL34ZG with Pb-Free Bar Line Indicator SY100EL34ZG with Pb-Free Bar Line Indicator Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC electricals only. 2. Tape and reel. Pin Configuration Precision Edge® SY10EL34/L SY100EL34/L Lead Finish Pb-Free NiPdAu Pb-Free NiPdAu Pb-Free NiPdAu Pb-Free NiPdAu Pb-Free NiPdAu Pb-Free NiPdAu Pb-Free NiPdAu Pb-Free NiPdAu December 2011 16-Pin Narrow SOIC (Z16-2) 3 M9999-120611-I [email protected] or (408) 955-1690 Micrel, Inc. DC Electrical Characteristics(1) VEE = VEE (minimum) to VEE (maximum); VCC = GND. Symbol Parameter TA = −40°C Power Supply Current IEE Output Reference Voltage VBB IIH TA = 0°C IEE Input High Current Power Supply Current Output Reference Voltage VBB IIH TA = +25°C IEE Input High Current Power Supply Current Output Reference Voltage VBB IIH TA = +85°C IEE Input High Current Power Supply Current Output Reference Voltage VBB IIH Input High Current Note: 1. Parametric values specified at: − 5V Power Supply Range: 100EL34 Series: −4.2V to −5.5V 10EL34 Series: −4.75V to −5.5V − 3V Power Supply Range: 10/100EL34L Series: −3.0V to −3.8V 10EL 100EL 10EL 100EL 10EL 100EL 10EL 100EL 10EL 100EL 10EL 100EL 10EL 100EL 10EL 100EL Min. − − −1.43 −1.38 − − − −1.38 −1.38 − − − −1.35 −1.38 − − − −1.31 −1.38 − Typ. − − − − − − − − − − − − Precision Edge® SY10EL34/L SY100EL34/L Max. 49 49 −1.30 −1.26 150 49 49 −1.27 −1.26 150 49 49 −1.25 −1.26 150 49 54 −1.19 −1.26 150 Units mA V µA mA V µA mA V µA mA V µA December 2011 4 M9999-120611-I [email protected] or (408) 955-1690 Micrel, Inc. AC Electr.


SY10EL35 SY100EL34L SY10EL34L


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)