DatasheetsPDF.com

MX27C8111 Dataheets PDF



Part Number MX27C8111
Manufacturers Macronix International
Logo Macronix International
Description 8M-BIT [1M x8/512K x16] CMOS OTP ROM WITH PAGE MODE
Datasheet MX27C8111 DatasheetMX27C8111 Datasheet (PDF)

PRELIMINARY MX27C8111 FEATURES 8M-BIT [1M x8/512K x16] CMOS OTP ROM WITH PAGE MODE • • • • Completely TTL compatible Operating current: 60mA Standby current: 100uA Package type: - 42 pin plastic DIP - 44 pin SOP • • • • • • With Page Mode function, 8-word/16-byte page 1M x 8 or 512K x 16 organization +12.5V programming voltage Fast access time:90/100/120/150 ns Page mode access time 50/60/75 ns Totally static operation GENERAL DESCRIPTION The MX27C8111 is a 8M-bit, One Time Programmable Rea.

  MX27C8111   MX27C8111


Document
PRELIMINARY MX27C8111 FEATURES 8M-BIT [1M x8/512K x16] CMOS OTP ROM WITH PAGE MODE • • • • Completely TTL compatible Operating current: 60mA Standby current: 100uA Package type: - 42 pin plastic DIP - 44 pin SOP • • • • • • With Page Mode function, 8-word/16-byte page 1M x 8 or 512K x 16 organization +12.5V programming voltage Fast access time:90/100/120/150 ns Page mode access time 50/60/75 ns Totally static operation GENERAL DESCRIPTION The MX27C8111 is a 8M-bit, One Time Programmable Read Only Memory with page mode. It is organized as 1M x 8 or 512K x 16, operates from a single + 5 volt supply, has a static standby mode, and features fast single address location programming. All programming signals are TTL levels, requiring a single pulse. For programming outside from the system, existing EPROM programmers may be used. The MX27C8111 supports a intelligent fast programming algorithm which can result in programming time of less than two minutes. MX27C8111 provides Page Read Access Mode which can greatly reduce the read access time. Normal read access time and Page Mode read access time is as fast as 90/50ns. It is designed to be compatible with all microprocessors and similar applications in which high perofmrance, large bit storage and simple interfacing are important design considerations. This One Time Programmable Read Only Memory is packaged in industry standard 42 pin dual-in-line plastic package and 44 pin SOP packages. PIN CONFIGURATIONS PDIP A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE GND OE Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 NC A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE/VPP GND Q15/A-1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC SOP NC A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE GND OE Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 NC NC A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE/VPP GND Q15/A1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC P/N: PM0329 MX27C8111 MX27C8111 1 REV. 2.6, AUG. 22, 2001 MX27C8111 PIN DESCRIPTION SYMBOL A0~A18 Q0~Q14 CE OE BYTE/VPP Q15/A-1 VCC GND PIN NAME Address Input Data Input/Output Chip Enable Input Output Enable Input Word/Byte Selection /Program Supply Voltage Q15(Word mode)/ LSB addr. (Byte mode) Power Supply Pin (+5V) Ground Pin VCC GND A0~A18 ADDRESS INPUTS . . . . . . . . X-DECODER Y-DECODER . . . . . . . . 8M BIT CELL MAXTRIX Y-SELECT BLOCK DIAGRAM CE OE BYTE/VPP CONTROL LOGIC OUTPUT BUFFERS Q0~Q14 Q15/A-1 TRUTH TABLE OF BYTE FUNCTION BYTE MODE(BYTE = GND) CE H L L OE X H L Q15/A-1 X X A-1 input MODE Non selected Non selected Selected Q0-Q7 High Z High Z DOUT SUPPLY CURRENT Standby(ICC2) Operating(ICC1) Operating(ICC1) WORD MODE(BYTE = VCC) CE H L L OE X H L Q15/A-1 High Z High Z DOUT MODE Non selected Non selected Selected Q0-Q14 High Z High Z DOUT SUPPLY CURRENT Standby(ICC2) Operating(ICC1) Operating(ICC1) NOTE : X = H or L P/N: PM0329 REV. 2.6, AUG. 22, 2001 2 MX27C8111 FUNCTIONAL DESCRIPTION THE PROGRAMMING OF THE MX27C8111 AUTO IDENTIFY MODE When the MX27C8111 is delivered, the chip has all 8M bits in the "ONE" or HIGH state. "ZEROs" are loaded into the MX27C8111 through the procedure of programming. For programming, the data to be programmed is applied with 16 bits in parallel to the data pins. Vcc must be applied simultaneously or before Vpp, and removed simultaneously or after Vpp. When programming an MXIC One Time Programmable Read Only Memory, a 0.1uF capacitor is required across Vpp and ground to suppress spurious voltage transients which may damage the device. The auto identify mode allows the reading out of a binary code from an One Time Programmable Read Only Memory that will identify its manufacturer and device type. This mode is intended for use by programming equipment for the purpose of automatically matching the device to be programmed with its corresponding programming algorithm. This mode is functional in the 25° C± 5°C ambient temperature range that is required when programming the MX27C8111. To activate this mode, the programming equipment must force 12.0 ± 0.5 V on address line A9 of the device. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during auto identify mode. Byte 0 ( A0 = VIL) represents the manufacturer code, and byte 1 (A0 = VIH), the device identifier code. For the MX27C8111, these two identifier bytes are given in the Mode Select Table. All identifiers for manufacturer and device codes will possess odd parity, with the MSB (Q15) defined as the parity bit. at VIH, VPP at its programming voltage. FAST PROGRAMMING The device is set up in the fast programming mode when the programming voltage VPP = 12.75V is applied, with VCC = 6.25 V and OE = VIH (Algorithm is shown in Figure 1). The programming is achieved by applying a single TTL low level 50us pu.


MX27C2000A MX27C8111 MX27C8100


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)