DatasheetsPDF.com

ICS87354I

Integrated Circuit Systems

CLOCK GENERATOR

PRELIMINARY Integrated Circuit Systems, Inc. ICS87354I ÷4/÷5 DIFFERENTIAL-TO-2.5V/3.3V LVPECL CLOCK GENERATOR FEATURES...


Integrated Circuit Systems

ICS87354I

File Download Download ICS87354I Datasheet


Description
PRELIMINARY Integrated Circuit Systems, Inc. ICS87354I ÷4/÷5 DIFFERENTIAL-TO-2.5V/3.3V LVPECL CLOCK GENERATOR FEATURES 1 differential 2.5V/3.3V LVPECL / ECL output 1 CLK, nCLK input pair CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL Maximum output frequency: 250MHz Input frequency: >1GHz Translates any single ended input signal to 3.3V LVPECL levels with resistor bias on nCLK input Output skew: 38ps (maximum) Part-to-part skew: 375ps (maximum) Propagation delay: 2.1ns (maximum) LVPECL mode operating voltage supply range: VCC = 2.375V to 3.8V, VEE = 0V ECL mode operating voltage supply range: VCC = 0V, VEE = -2.375V to -3.8V -40°C to 85°C ambient operating temperature GENERAL DESCRIPTION The ICS87354I is a high performance ÷4/÷5 Differential-to-2.5V/3.3V ECL/LVPECL Clock GeneraHiPerClockS™ tor and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The CLK, nCLK pair can accept most standard differential input levels. The ICS87354I is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the ICS87354I ideal for those clock distribution applications demanding well defined performance and repeatability. ,&6 BLOCK DIAGRAM CLK nCLK R ÷4 ÷5 0 1 Q nQ PIN ASSIGNMENT CLK nCLK MR F_SEL 1 2 3 4 8 7 6 5 Vcc Q nQ VEE MR ICS87354I 8-Lead SOIC 3.90mm x 4.90mm x 1.37mm package body M Package Top View F_S...




Similar Datasheet




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)