ICS8735-21

Integrated Circuit Systems, Inc. ICS8735-21 700MHZ, DIFFERENTIAL-TO-3.3V LVPECL ZERO DELAY CLOCK GENERATOR FEATURES 1 differential 3.3V LVPECL output pair, 1 differential feedback output pair Differential CLK, nCLK input pair CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL Output frequency range: 31.25MHz to 700MHz Input frequency range: 31.25MHz to 700MHz VCO range: 250MHz to 700MHz Programmable dividers allow for the following output-to-input frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8 External feedback for “zero delay” clock regeneration with configurable frequencies Cycle-to-cycle jitter: 25ps (maximum) Static phase offset: 50ps ± 100ps 3.3V supply voltage 0°C to 70°C ambient operating temperature Industrial temperature information available upon request GENERAL DESCRIPTION The ICS8735-21 is a highly versatile 1:1 Differential-to-3.3V LVPECL clock generator and a HiPerClockS™ member of the HiPerClockS™family of High Performance Clock Solutions from ICS. The CLK, nCLK pair can accept most standard differential input levels. The ICS8735-21 has a fully integrated PLL and can be configured as zero delay buffer, multiplier or divider, and has an output frequency range of 31.25MHz to 700MHz. The reference divider, feedback divider and output divider are each programmable, thereby allowing for the following output-to-input frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8. The external feed...