MC74HC76

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual JK Flip-Flop With Set and Reset High–Performance Silicon–Gate CMOS The MC74HC76 is identical in pinout to the LS76. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Each flip–flop is negative–edge clocked and has active–low asynchronous Set and Reset inputs. The HC76 is identical in function to the HC112, but has a different pinout. 16 1 MC74HC76 N SUFFIX PLASTIC PACKAGE CASE 648–08 16 1 D SUFFIX SOIC PACKAGE CASE 751B–05 Similar in Function to the LS76 Except When Set and Reset Are Low Simultaneously Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 2 to 6V Low Input Current: 1µA High Noise Immunity Characteristic of CMOS Devices In Compliance With the JEDEC Standard No. 7A Requirements Chip Complexity: 100 FETs or 25 Equivalent Gates LOGIC DIAGRAM Set1 K1 Clock1 J1 Reset1 Set2 K2 Clock2 J2 Reset2 2 16 1 4 3 7 12 6 9 8 10 PIN 5 = VCC PIN 13 = GND Q2 11 Q2 14 Q1 Clock2 6 Set2 7 Reset2 8 11 Q2 10 Q2 9 J2 15 Q1 ORDERING INFORMATION MC74HCXXN MC74HCXXD Plastic SOIC Pinout: 16–Lead Packages (Top View) Clock1 1 Set1 2 Reset1 3 J1 4 VCC 5 16 K1 15 Q1 14 Q1 13 GND 12 K2 FUNCTION TABLE Inputs Set L H L H H H H H H H Reset H L L H H H H H H H Clock X X X J X X X L L H H X X X K X X X L H L H X X X Q Outputs Q L H H L L H L* L* No Change L H H L Toggle No Change No Change No Change...