MT90733

CMOS ® MT90733 DS3 Framer (DS3F) Advance Information Features DS3 payload access in either bit-serial or nibble-parallel mode C-bit parity or M13 operating mode Separate interface for C-bits Detect and generate DS3 AIS, and idle signals Transmit reference generator for serial operation Transmit and receive FEAC channel under software control Transmit single errors: framing, FEBE, C-bit parity, and P-bit parity FEBE, C-bit and P-bit performance counters Transmit-to-Receive and Receive-to-Transmit loopbacks Subrate multiplexing Wideband data or video transport DS3 monitor and test Channel extenders Line Side X1 X2 FE D3RD D3RC CRD CRCK CRF CRDCC STUFC STUFD AD(7-0) WR RD ALE SEL OENA FORCEOE CXD CXCK CXF CXDCC D3TD D3TC FORCECP FORCEPP FORCFEBE U.S. Patent Number 5040170 ISSUE 1 May 1995 Ordering Information MT90733AP 68 Pin PLCC -40° to 85°C Description The MT90733 DS3 Framer (DS3F) is designed for mapping broadband payloads into the DS3 frame format, which meets ANSI’s T1.107-1988 and supplement T1.107a-1990. Although the C-bit parity format is recommended, the DS3F can also operate in the M13 mode. In the C-bit parity format, the DS3F provides a separate interface for selected C-bits. The DS3F also provides software access for transmitting and receiving the FEAC channel, and generates and detects DS3 AIS, DS3 idle, Pbit parity and C-bit parity. In addition, performance counters are provided, as well as the ability to generate single framing, FEBE, C-...