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T15M1024A

TM tech

128K X 8 LOW POWER CMOS STATIC RAM

tm TE CH T15M1024A SRAM FEATURES • Low-power consumption - Active: 40mA at 55ns - Stand-by: (CMOS input/output) 0 ~ +...


TM tech

T15M1024A

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Description
tm TE CH T15M1024A SRAM FEATURES Low-power consumption - Active: 40mA at 55ns - Stand-by: (CMOS input/output) 0 ~ +70 °C = 15uA -40 ~ +85 °C = 20uA 55/70/100 ns access time Equal access and cycle time Single +5V (±10%) Power Supply TTL compatible , Tri-state output Common I/O capability Automatic power-down when deselected Available in 32-pin SOP ,TSOP-I(8x20mm), TSOP-I(8x13.4mm) and DIP (600 mil) package. 128K X 8 LOW POWER CMOS STATIC RAM GENERAL DESCRIPTION The T15M1024A is a very Low Power CMOS Static RAM organized as 131,072 words by 8 bits. That operates on a wide voltage range from +5V (±10%) power supply, Fabricated using high performance CMOS technology, Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Data retention is guaranteed at a power supply voltage as low as 1.5V. BLOCK DIAGRAM PART NUMBER EXAMPLES PART NO. T15M1024A-55D T15M1024A-70H T15M1024A-100P T15M1024A-100N T15M1024A-55DI T15M1024A-70HI T15M1024A-100PI T15M1024A-100NI PACKAGE CODE D=SOP H=TSOP-I(8x20) P=TSOP-I(8x13.4) N=DIP (600 mil) D=SOP H=TSOP-I(8x20) P=TSOP-I(8x13.4) N=DIP (600 mil) Operating Temperature 0 ~ +70 °C Vcc Vss A0 . . . A16 WE OE CE1 CE2 DECODER CORE ARRAY -40 ~ +85 °C CONTROL CIRCUIT DATA I/O I/O1 .. I/O8 TM Technology Inc. reserves the right to change products or specifications without notice. P. 1 Publication Date: FEB. 2002 Revision:A tm NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O...




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